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SpaceX • Irvine, California, United States
Salary: $120,000.00 - $145,000.00/per year
Role & seniority: Design Verification Engineer (Silicon Engineering); level I/II (posted pay bands)
Stack/tools: digital ASIC verification; SystemVerilog testbenches (UVM and non-UVM); test plans; test harnesses; Python and MATLAB for automation; DSP blocks; RTL design, chip bring-up, post-silicon validation
Verify digital ASICs at block and system level; develop and execute test plans; create/test sequences and testbenches
Run regressions, close code/functional coverage; automate test case generation
Contribute to pre-silicon verification, chip bring-up, and post-silicon validation; hands-on verification
Bachelor’s in electrical engineering, computer science, or computer engineering
2+ years in design verification and test bench development
Experience with verification methodologies (UVM), Python scripting, object-oriented programming
Constrained random verification, test planning, coverage analysis; RTL design/bring-up
Advanced degree (MS/PhD)
Post-silicon validation experience; MATLAB proficiency
Deep experience with DSP blocks and system-level verification
Location & work type: Not specified; full-time, with extended hours/weekends as needed; ITAR/compliance requirements apply (U.S. citizen/green card or eligible)
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SOC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
Design Verification Engineer/Level I: $120,000.00 - $145,000.00/per year
Design Verification Engineer/Level II: $140,000.00 - $170,000.00/per year Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience. Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.