Role & seniority: Verification Engineer (IP/SoC verification) focused on graphics processor features; senior-level emphasis on test planning, development, and debugging.

Stack/tools: IP/SOC ASIC verification; Verilog, SystemVerilog; C/C++; UVM testbenches; Linux and Windows; RTL/firmware debugging; test planning and coverage tooling; scripting (Perl, Ruby, Makefiles, shell); SystemC/TLM; automation in distributed compute environments; graphics pipeline knowledge.

Top 3 responsibilities

Collaborate with architects, hardware, and firmware engineers to understand features to verify; build test plan documentation.
Develop directed and random verification tests; estimate effort; create/modify test environments; review coverage metrics.
Debug test failures with RTL/firmware teams to identify root causes and resolve design/test issues; adjust tests to meet coverage targets.

Must-have skills

Proficiency in IP/SOC level ASIC verification; UVM-based testbenches; Verilog/SystemVerilog; C/C++; Linux and Windows environments.
Debugging firmware and RTL; strong analytical/problem-solving skills; ability to collaborate across sites/timezones.
Graphics pipeline knowledge; scripting experience (Perl, Ruby, Makefile, shell); SystemC/TLM exposure; solid test planning and coverage mindset.

Nice-to-haves

Leadership or mentorship experience; experience with video codecs or multimedia systems; automated workflows in distributed compute; HLS tools/process

Full Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the directed and random verification tests
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

PREFERRED EXPERIENCE

Proficient in IP/SOC level ASIC verification
Proficient in debugging firmware and RTL code using simulation tools
Proficient in using UVM testbenches and working in Linux and Windows environments
Experienced with Verilog, System Verilog, C, and C++
Graphics pipeline knowledge
Developing UVM based verification frameworks and testbenches, processes and flows
Automating workflows in a distributed compute environment.
Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
Strong background in the C++ language, preferably on Linux with exposure to Windows platform

SOC Design Verification Engineer