Role & seniority: MTS Silicon Design Engineer (mid-to-senior; individual contributor in silicon design verification)

Stack / tools: IP-level ASIC verification; Verilog, SystemVerilog; C/C++; UVM-based testbenches; DV methodology; Linux & Windows; RTL debugging; testbench development; DFT/DFD awareness; scripting (Perl, Ruby, Makefile, shell)

Top 3 responsibilities

Collaborate with architects/hardware engineers to verify new features and build verification plans
Develop UVM-based testbenches, test cases, models, and directed/random verification tests
Debug failures, drive root-cause analysis, and ensure 100% verification completeness via coverage (code, functional, assertions)

Must-have skills

IP-level ASIC verification experience
Proficiency with Verilog/SystemVerilog, C/C++
Experience with UVM, testbench development, and verification frameworks
Debugging RTL/firmware using simulation tools; Linux/Windows familiarity
Understanding of DFT/DFD; ability to design/execute regression suites

Nice-to-haves

Leadership or mentorship experience
Scripting proficiency (Perl, Ruby, Makefile, shell)
Prior experience building verification environments and coverage-driven flows
Location & work type: Location not specified; work type not stated (role implies ongoing collaboration across sites/timezones)

Full Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

MTS SILICON DESIGN ENGINEER

THE ROLE

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES

Collaborate with architect and hardware engineers, to understand the new features to be verified
Create block-/chip-level Design Verification (DV) test plan.
Create methodology-based (UVM) verification testbenches and components from scratch
Develop test cases, behavioral functional models and testbench
Understand Design-for-Test (DFT) and Design-for-Debug (DFD) architecture
Build the directed and random verification tests
Debug test failures to determine the root cause; work with RTL engineers to resolve design defects and correct any test issues
Quality deliverables through regressions

Verification coverage: code-coverage, functional coverage, assertions, to achieve 100% verification completeness

PREFERRED EXPERIENCE

Proficient in IP level ASIC verification
Proficient in debugging firmware and RTL code using simulation tools
Proficient in using UVM testbenches and working in Linux and Windows environments
Experienced with Verilog, System Verilog, C, and C++
Developing UVM based verification frameworks and testbenches, processes and flows
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language

Sr.Design Verification (DFT-FV)