Role & seniority

Embedded Firmware Test Engineer (Intermediate)

Stack / tools

Pre-silicon FPGA and post-silicon ASIC firmware validation
Vendor SDKs for functional validation and power characterization
Automated test/regression environments
Languages: C, C++, Python; Linux (mandatory); scripting
RTOS-based systems
Lab tools: Oscilloscopes, Logic Analyzers
Hardware: FPGA/ASIC development boards, EVBs, form-factor devices
Nice-to-have: FPGAs, board design, I2C/SPI/UART, MIPI

Top 3 responsibilities

Define and develop tests based on vendor SDKs for functional validation and power characterization
Develop automated test and regression environments; augment vendor tests to improve FPGA/ASIC coverage; reproduce/rebuild known issues
Deliver test plan coverage for FPGA and ASIC; measure power on EVBs; create dashboards to track regressions and instabilities

Must-have skills

Bachelor’s or Master’s in Electrical Engineering and/or Computer Science; ~3+ years in a similar role
Proficient in Linux
Proficient in C, C++, and Python; scripting experience
Experience with RTOS-based systems
Experience with potentially unstable hardware/software under development
Lab experience with oscilloscopes, logic analyzers

Nice-to-haves

Experience with FPGAs, board design
Familiarity with low-speed interfaces (I2C, SPI, UART) and MIPI

Location & work type

San Jose, CA
12+ month contract (on-site)

Full Description

Dice is the leading career destination for tech experts at every stage of their careers. Our client, Artech, LLC, is seeking the following. Apply via Dice today!

Do something big and innovative! Stretch your creative muscles and work on big issues. Since 1989, we have developed technology environments, applications, and tools by providing experienced teams to implement, enhance, and maintain our clients essential systems and applications. Come join the Scalence team!

Embedded Firmware Test Engineer (Intermediate)

San Jose, CA

12 months+

Project Overview

This team is developing a reference design for our next gen of glasses.

Responsibilities

Pre-silicon FPGA and Post-Silicon ASIC firmware validation. Define and develop tests based on vendor-provided SDKs for functional validation and power characterization. Develop automated test/regression environments based on vendor-provided tests. Develop targeted tests to reproduce reported issues.

Deliverables

Test Plan Coverage on FPGA and ASIC: Run vendor-provided tests and establish a baseline on the FPGA. Augment vendor-provided tests to improve coverage of P0 product features on FPGA and ASIC. Support this activity through various hardware and software releases. Track and drive resolution of potential instabilities.

Power Measurements and Optimization: Work on EVBs and Form factor devices based on the ASICs to measure and optimize power. Develop dashboards to help track power regressions. Create automated test environments based on the vendor-provided tests and XR team s tests. Track, triage, and resolve regressions.

Candidates must possess

Bachelors or Masters in Electrical Engineering and/or Computer Science with a minimum of 3 years of experience in a similar role. Working proficiency in Linux (mandatory). Readability in C, C++, and Python. Experience with scripting. Familiarity with RTOS-based systems. Experience working with potentially unstable hardware/software under development.

Lab experience: Working with Oscilloscopes, Logic Analyzers, etc.

Nice to have

Experience with FPGAs, board design, low-speed interface protocols (I2C, SPI, UART), and MIPI.