Full Description

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are

You are a seasoned verification leader, ready to drive technical excellence and inspire teams at the forefront of digital ASIC innovation. With over eight years of progressive experience in digital design and verification, you have a track record of delivering complex projects and scaling best practices across organizations. Your expertise in SystemVerilog/UVM and digital circuit design is matched by your ability to architect robust verification strategies and guide others in executing them. As a Principal Engineer, you naturally take ownership, providing technical direction while fostering a culture of collaboration, accountability, and continuous improvement. Colleagues look to you for mentorship, and you excel at elevating team performance through coaching and knowledge sharing. You are adept at communicating across disciplines and with stakeholders at all levels, ensuring alignment on priorities and objectives. Your leadership style is inclusive and empowering, encouraging innovation and adaptability within your team. Whether solving intricate design challenges or shaping verification methodologies, you are motivated by a desire to make a lasting impact on both products and people. You thrive in dynamic environments, embrace the responsibility of shaping future engineers, and are committed to upholding Synopsys’ standards of technical excellence and integrity.

What You’ll Be Doing

Leading the definition, development, and execution of advanced verification strategies for next-generation HBM products. Architecting complex testbenches and environments using SystemVerilog/UVM, setting standards for the broader team. Providing technical leadership in debugging, root cause analysis, and resolution of challenging testbench and design issues. Guiding and mentoring junior and senior engineers, fostering skill development and knowledge transfer within the team. Collaborating with design, architecture, and mixed-signal teams to ensure seamless integration and alignment across project phases. Driving process improvements, implementing automation and scripting (Python, Perl) to enhance verification productivity and reliability. Representing the verification function in cross-functional meetings, communicating progress, risks, and mitigation strategies to stakeholders.

The Impact You Will Have

Shape the technical direction and verification methodologies for industry-leading HBM products. Elevate the capability and performance of the verification team through leadership and mentorship. Accelerate project timelines and improve product quality by implementing efficient, scalable verification solutions. Ensure rigorous verification standards, reducing risk and reinforcing Synopsys’ reputation for excellence. Drive cross-functional collaboration, aligning teams toward common goals and successful project outcomes. Serve as a role model and technical authority, inspiring the next generation of engineers at Synopsys.