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Staff Verification Engineer

onsemi Bengaluru, Karnataka, India

onsitefull-time
Posted Feb 11, 2026

Role & seniority: Staff ASIC Verification Engineer (senior/lead-level role)

Stack / tools: SystemVerilog (OVM/UVM); testbench development; reusable Verification IP (VIP); languages: C/C++, Perl, Tcl, Python, Verilog PLI; familiarity with I2C/SPI; UPF (nice-to-have); formal verification (nice-to-have)

Top 3 responsibilities

  • Develop and execute verification plans; achieve coverage closure with high-quality results

  • Create/enhance testbenches and implement reusable VIP; collaborate with third-party VIP providers

  • Apply ASIC verification methodologies, coverage-driven and constraint-random verification; advocate object-oriented practices

Must-have skills

  • Proficiency in SystemVerilog (OVM/UVM) and testbench creation

  • Experience with coverage models, assertions, and directed/random stimulus

  • Programming/scripting in C/C++, Python, Perl, Tcl; familiarity with I2C/SPI

  • Strong communication and collaboration abilities

Nice-to-haves

  • Low-power verification experience (UPF)

  • Formal verification techniques

  • Experience working with external vendors or customers

  • Location & work type: Location and work type not specified in provided text

Full Description

We are seeking an experienced Staff ASIC Verification Engineer to join our dynamic team. As a verification engineer, you will play a crucial role in ensuring the quality and reliability of our cutting-edge semiconductor designs. If you thrive in a collaborative environment and have a passion for solving complex challenges, this role is for you.

Responsibilities

Verification Planning and Execution

  • Develop and execute comprehensive verification plans.
  • Close verification with coverage closure, ensuring high-quality results.
  • Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions.

Testbench Development

  • Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages.
  • Implement reusable Verification IP (VIP) components.
  • Collaborate with third-party VIP providers.

Methodology and Flows

  • Demonstrate a solid understanding of ASIC design and verification methodologies.
  • Apply object-oriented programming principles effectively.
  • Implement constraint random verification methodology.

Technical Skills

  • Proficiency in SystemVerilog (OVM/UVM) and other relevant languages (C/C++, Perl, Tcl, Python, Verilog PLI).
  • Familiarity with industry standards (e.g., I2C/SPI).
  • Experience with low-power verification using UPF (Unified Power Format) is a plus.
  • Knowledge of formal verification techniques is advantageous.

Collaboration and Communication

  • Work effectively with internal teams and external customers.
  • Strong written and verbal communication skills.
  • Initiative, analytical problem-solving abilities, and adaptability within a diverse team environment.
  • #LI-RG1

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here

https: //www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

SystemVerilogOVMUVMCC++PerlTclPythonVerilog PLIASIC DesignVerification MethodologiesTest PlanningTestbench DevelopmentCollaborationProblem SolvingAnalytical Skillsmulti-location

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