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Google • Sunnyvale, California, United States
Salary: $132,000 - $189,000 / year
Role & seniority: ASIC Formal Verification Engineer (mid–senior level) for Google AI/ML hardware acceleration projects.
Stack/tools: Formal verification tools (Jasper, VC Formal, Questa Formal, 360-DV); SystemVerilog/Verilog; scripting languages (nice-to-have).
Plan the formal verification strategy and define properties/constraints for digital design blocks.
Use formal property verification tools and closure techniques to verify properties.
Architect and implement reusable formal verification components; contribute verification methodology improvements.
Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or related field (or equivalent practical experience).
4 years of experience in formal and design verification.
Proficiency with SystemVerilog/Verilog.
Experience with one or more formal verification tools (e.g., Jasper, VC Formal, Questa Formal, 360-DV).
Master’s or PhD in relevant fields.
6+ years of experience with industry-standard IC development tools, languages, and methodologies.
Experience with scripting languages; excellent communication and collaboration skills.
Location & work type: United States-based, full-time role with base salary range $132,000–$189,000 plus bonus, equity, and benefits; compensation varies by location, skills, and experience.
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As an ASIC Formal Verification Engineer, you will contribute formal verification expertise to verify the digital designs, with a specific focus on TPU architecture and its integration within AI/ML- driven systems. You will be part of a team developing ASICs used to accelerate computation in data centers. You will have responsibilities in areas such as project definition, formal verification, and silicon bringup. You will participate in the architecture, documentation, and verification of the next generation of data center accelerators.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more
about benefits at Google [https: //careers.google.com/benefits/].