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IBM • Bengaluru, Karnataka, India
Role & seniority: Senior/lead Software Developer with complete ownership of SW efforts for ASIC/SoC and processor programs; technical leadership of software teams (15+ years overall).
Stack/tools: C/C++ (deep proficiency), scripting (Python, Perl, Shell), assembly; emulation/validation environments (FPGA, Spike, QEMU); test/validation tools, firmware/driver development; experience with multi-processor cache coherency, memory subsystems, power management, IO, and bring-up activities.
Lead end-to-end software development for pre/post-silicon validation of IBM server processors, SoCs, and ASICs; deliver validation tools, test content, FW/driver, and automation frameworks.
Design and implement algorithms for Post-Silicon Validation; develop test plans/strategies and drive coverage goals across verification, design, and lab teams.
Debug and bring up SOCs/processors, coordinate with hardware design, lab, performance, and characterization teams; mentor and empower project teams; perform hands-on coding and debugging.
15+ years in hands-on software development (C/C++), strong scripting (Python/Perl, Shell).
Technical leadership experience (≥5 years); excellent communication and agile-process experience.
In-depth computer architecture knowledge; experience with multi-processor cache coherency, memory subsystems, OS concepts (multithreading, memory management).
Emulator/FPGA validation experience preferred
Introduction
At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance, security, and scalability that clients and industries depend on every day. Working in Infrastructure & Technology means tackling complex challenges with curiosity and collaboration. You’ll work with diverse technologies and colleagues worldwide to deliver resilient, future-ready solutions that power innovation. With continuous learning, career growth, and a supportive culture, IBM provides the opportunities to build expertise and shape the infrastructure that drives progress.
Your Role And Responsibilities
Candidate will be involved in leading SW development effort for ASICs/SOC and processor programs with complete ownership. He/She will be expected to drive SW development leading to validation tools, test content, FW/driver and automation framework for pre and post Silicon validation. Candidate shall design and develop algorithms for Post Silicon Validation of next generation IBM server processors, SOCs and ASICs. Candidate must work on coverage closure by developing comprehensive test plans and strategies He/She will drive to achieve coverage goals while interacting with verification, design and Lab teams The candidate will be expected to interface with multiple stakeholders in hardware design teams, lab teams, performance teams and characterization teams He/She will be driving development, execution and debug activities in skilled in C/C++, assembly and scripting languages like Python/Perl to address complex test scenarios to automate/optimize Responsible for verifying multi-processor core, cache, memory hierarchy and IO sub-systems, Power management, reset, coherency and other functional capabilities and features in SOCs/Processor Addressing validation in emulation environments(FPGA/emulators) He/She will be working on SOC/processor Bringup Activities and own key debugs during the bring up/power on phase She/he will be responsible for enabling and empowering team members to deliver at a project level
Preferred Education
Master's Degree
Required Technical And Professional Expertise
Over 15 years experience in hands on Software development using C, C++. Atleast 5 years experience in technical leadership of software teams
Technical Expertise: Very proficient in C programming, Strong Scripting skills(PERL/Python and Shell).
Computer Architecture Knowledge: In-depth knowledge of computer architecture, including processor core design specifications, instruction set architecture, and logic verification.
Multi-Processor Cache Coherency: Experience in verifying multi-processor cache coherency and memory subsystems, ensuring seamless operation in complex systems.
Operating Systems and Concepts: Atleast 2 years experience with Multithreading, context switching, memory management related development Proficiency in emulator env/FPGA validation is preferred. He/She must also demonstrate excellent communication skills. Candidate should have implemented agile processes in his/her prior leadership roles. The candidate must have an eagerness and curiosity to learn and be willing to code and participate hands on.
Preferred Technical And Professional Experience
IO device drivers, firmware exposure(NIC controller, PCIe device controllers, ASIC FW development experience) X86 Architecture, ARM architecture RISC V architecture Spike simulator experience, QEMU simulator