Full Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Key Responsibilities

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other hardware features/components Estimate the time required to write the new feature tests and any required changes to the test environment, and drive and own tracked related activities Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL and stakeholders to resolve design defects and correct any test issues Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements Coordinate small teams focused on shared product delivery, and mentor junior engineers.

Preferred Experience

Experience in Digital Design Verification Strong skills with System Verilog and UVM. Good skills with Verilog. Exposure to both maintaining an existing Verification Environment as well as creating one from scratch. Strong skills with functional verification tools by VCS, optional with Cadence, Mentor Graphics.

Experience delivering design features/functionalities on all stages: specs, test plan, enablement, functional/code coverage closure Strong ownership and drive capabilities, with limited guidance Experience working in a Unix/Linux environment. Good scripting skills (Perl, Shell, Ruby). Exposure to leadership or mentorship Good computer architecture, cache coherency knowledge Experience working with complex designs (not just I2C and other similar designs) Exposure to simulation profile, efficiency improvement, acceleration Exposure to automating workflows in a distributed compute environment.