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Control Fabric Design Verification Engineer

AMD Folsom, California, United States

onsitefull-time

Salary: $139,360 - $209,040 / year

Posted Feb 16, 2026Apply by Mar 18, 2026

Role & seniority

  • Design Verification Engineer (mid-level)

Stack / tools

  • UVM / SystemVerilog, C-DPI for HW/SW co-verification

  • C/C++, Python or Perl for automation

  • Familiarity with AXI/AHB/AMBA interconnects

  • ASIC verification tools, simulation, and formal verification

  • Embedded firmware development and debugging

Top 3 responsibilities

  • Develop and execute subsystem-level verification plans (functional, performance, security)

  • Build/maintain testbenches (UVM/SystemVerilog); perform HW/SW co-verification with C-DPI

  • Validate firmware/hardware features, debug failures, and drive verification closure (functional and code coverage)

Must-have skills

  • Strong knowledge of C/C++, SystemVerilog, and UVM methodology

  • Experience with C-DPI co-verification and hardware/software co-design

  • Familiarity with standard bus protocols (AXI/AHB/AMBA)

  • Firmware development/debug on embedded processors

  • Scripting for automation (Python, Perl)

Nice-to-haves

  • ASIC verification tools, simulation environments, formal verification

  • Experience with SoC architectures and subsystems

  • Strong problem-solving, collaboration, and cross-team communication

Location & work type

Location: Folsom, CA

  • Full-time role; not eligible for visa sponsorship

Notes

  • No unsolicited resumes from recruiters

  • Equal opportunity employer; may use AI in screening

  • Benefits described at AMD benefits at a glance

Full Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

As a Design Verification Engineer, you will play a key role in verifying complex IP blocks and firmware through advanced verification methodologies. You will collaborate closely with hardware and firmware teams to validate subsystem-level functionality, performance, and security features. This position offers exposure to cutting-edge SoC architectures, hardware/software co-design, and innovative verification techniques.

The Person

We are seeking an engineer with a strong foundation in computer architecture and SoC design principles. The ideal candidate demonstrates problem-solving ability, technical expertise, and effective communication skills to work across diverse teams. We value individuals who are detail-oriented, adaptable, and committed to delivering high-quality results.

Key Responsibilities

Develop and execute subsystem-level verification plans, including functional, performance, and security verification. Build and maintain UVM/SystemVerilog-based testbenches and leverage C-DPI for hardware/software co-verification. Test firmware/hardware features and debug failures seen during their testing. Drive verification closure by achieving functional coverage, code coverage, and meeting quality metrics. Participate in subsystem specification reviews and contribute to HW/FW co-design strategies.

Preferred Experience

Strong understanding of C/C++, UVM methodology, SystemVerilog, and C-DPI co-verification techniques. Familiarity with standard bus protocols (AXI, AHB, AMBA) and interconnect architectures. Experience with firmware development and debug on embedded processors. Proficiency in scripting languages (Python, Perl, or similar) for automation and infrastructure development. Knowledge of ASIC verification tools, simulation environments, and formal verification.

Academic Credentials

Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering or equivalent preferred

Location

Folsom, Ca

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

UVM MethodologySystemVerilogC-DPIHardware/Software Co-verificationFunctional CoverageCode CoverageComputer ArchitectureSoC DesignC/C++AXIAHBAMBAFirmware DevelopmentPythonPerlASIC Verificationmulti-location

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