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TALENT Software Services • United States
Role & seniority: ASIC Verification Engineer – ARM; 5–8+ years of hands-on verification experience; individual contributor driving core IP verification.
Stack / tools: ARM IPs (Cortex-A v9, Mali GPU, CSS600, CoreSight); UVM / SystemVerilog; Formal verification; Constraint-random verification; Assertions; Coverage analysis and metrics; Gate-level simulation; C-based test case design; RTL reading (SystemVerilog, Verilog, VHDL); CI/CD; revision control; test benches (manufacturer-provided) and UVM environments; GLS debugging.
Own and develop verification of core IP blocks (spec reviews, verification plans, test case development, UVM environments, coverage, debugging).
Review architectural/design decisions and ramp up verification for ARM IPs; collaborate with multiple teams to refine requirements and debugging efforts.
Drive process improvements with the global verification team to raise overall design quality and verification efficiency.
5+ years hands-on verification experience with UVM/SystemVerilog, formal, constraint-random, coverage metrics, and related methodologies.
Deep knowledge of ARM IPs (CPU cortex‑A v9, Mali GPU, CSS600, CoreSight).
Proficiency in C-based test-case design for ARM IPs and reusing manufacturer test benches.
Experience with RTL reading (SystemVerilog/Verilog/VHDL), CI/CD, and version control.
Strong collaboration, documentation, and communication abilities.
Nice
"Possible 3 Month CTH | No Fees | Do Not Re-Post| Confidential
TMR ID: SITY4F
Role: ASIC Verification Engineer - ARM
Work location: Remote
Background and Meet and Greet: MANDATORY
"Location: remote
Experience: 5 to 8 years with atleast 5 years of strong hands on verification experience
Assure the overall quality of our designs, which contribute to exciting launches of wireless portable hardware at Snap A strong focus on ARM IPs (cpu (cortex-a v9 arch), gpu (mali), debug (css600, coresight), etc.) where your knowledge and experience will allow us to review architectural/design decisions and ramp up on verification of these blocks Serve as an individual contributor to own and develop the verification of our core IP blocks
Ownership throughout the whole project lifecycle, e.g.: Specification reviews, Verification plans, test case development, UVM environments, Coverage (analysis), Debugging, GLS, etc. Work closely with other teams to gather relevant information and share your knowledge about the design to further improve requirements and specifications. As well as providing vital feedback in their debugging efforts Collaborate with the global verification team to improve our processes and launch initiatives to improve the overall quality of the design as well as the way of working to become the best in class verification team
Proven (5+ years) hands-on experience with state-of-the-art verification methodologies and processes, such as UVM / SystemVerilog, Formal verification, Constraint-random verification, Assertions, Coverage metrics, Coverage analysis, Gate Level Simulation, Key Performance Indicators testing, etc.
Strong understanding of ARM related IPs is required: cpu (cortex-a v9 arch), gpu (mali), debug (css600, coresight), etc. Hands-on experience with designing and implementing C based test-cases to configure and test the ARM IPs as well as the ability to re-use the manufacturer provided test benches Experience with using and creating a UVM based test environment for block level verification as well as re-using those environments at (sub-)system level Ability to read and understand RTL code (SystemVerilog, Verilog, VHDL) Experience with revision control systems and CI/CD techniques Phenomenal interpersonal skills; ability to collaborate across teams, and to work independently Excellent process development, documentation and written and verbal communication skills
"
Open to Relocate?
Mariana Zarate - ERM
North America
Tel.: +***"