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Intel Corporation • Petah Tikva, Center District, Israel
Role & seniority: Experienced Hardware Verification Engineer (DV) for data-center connectivity; pre-silicon specialist focused on IP verification and microarchitecture validation.
Stack / tools: SystemVerilog, UVM; test benches, verification environments, IP verification plans; scripting languages; power and timing analysis tools as part of verification.
Develop and execute verification plans, create system models, and build/maintain test benches and verification infrastructure.
Verify designs against microarchitecture specs, analyze power/timing, replicate/root-cause/debug pre-silicon issues, and implement corrective actions.
Collaborate with architects, RTL/physical design, and other DV teams; document test plans and lead technical reviews; improve DV methodology.
4+ years in design verification.
Proficiency in SystemVerilog and UVM.
Verification at block level or Super Cluster experience.
Scripting language skills; experience with data-center connectivity solutions.
Knowledge of networking protocols and Smart NIC architectures.
Location & work type: Israel (Petah-Tikva primary, Haifa secondary); Hybrid work model (on-site and off-site); Experienced Hire.
Job Details
Be part of next generation Data-center Connectivity development for Smart NIC solutions. Develop IP verification plans, test benches, and verification environments to ensure coverage confirms to microarchitecture specifications.
Execute verification plans and define system simulation models to verify design, analyze power and timing, and uncover bugs. Replicate, root cause, and debug issues in the pre-silicon environment while finding and implementing corrective measures to resolve failing tests.
Collaborate with architects, RTL developers, physical design teams, and other DV teams to improve verification of complex architectural and microarchitectural features and develop common DV methodology. Document test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintain and improve existing functional verification infrastructure and methodology while participating in the definition of verification infrastructure and related Infrastructure needed for functional design verification.
Qualifications
At least 4 years of experience in design verification Proficiency in System Verilog UVM
Preferred Qualifications
Verification block level and Super Cluster experience Scripting language abilities Experience with data-center connectivity solutions Knowledge of networking protocols and Smart NIC architectures
Job Type
Experienced Hire
Shift
Shift 1 (Israel)
Israel, Petah-Tikva
Israel, Haifa
Business Group
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.