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Apple • London, England, United Kingdom
Role & seniority: Formal Verification Architect (senior/lead level)
Stack/tools: SoC/CPU/GPU design verification; formal verification tools (EDA formal tools); formal models and verification code; scripting languages; temporal logic assertion languages (SVA/PSL)
Lead complete formal verification for one or more design blocks/IPs (CPU, Media IP, Security IP, peripherals, interconnects, power management)
Develop formal micro-architecture specifications, verification plans, prove properties, find design bugs, and collaborate with design teams to improve micro-architecture
Create reusable/optimized formal models, verification code, and design-methodology frameworks to improve efficiency and productivity
Advanced knowledge of SoC/CPU/GPU, VLSI, digital logic design and verification
Proven formal property proofs on industrial designs; deep understanding of pipelines, memory/DMA, out-of-order/speculative execution, buses, cache coherence
Proficiency with formal verification technologies/abstraction; experience with EDA formal tools; strong debugging; scripting ability
Excellent teamwork and ability to develop world-class formal verification solutions
Tool development experience
Experience interpreting hardware specs and using temporal logic languages (SVA/PSL)
BS/MS/PhD in EE or CS
Location & work type: Location not specified; work type not specified in description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, amazing people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Do you love working on challenges that no one has solved yet? As a member of our dynamic group, you will have the unique and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day.
DESCRIPTION
As a formal verification architect leading the complete formal verification for single or multiple design blocks and IP’s (CPU, Media IP, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be
responsible for: Working with Apple's world-class SOC and IP design engineers to develop a formal micro-architecture specification Developing comprehensive formal verification test plan Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture Crafting novel and creative solutions for verifying complex design micro- architectures Developing and implementing re-usable and optimized formal models and verification code base Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity
MINIMUM QUALIFICATIONS
Advanced knowledge of SoC/CPU/GPU designs, VLSI, and digital logic design and verification techniques Developed formal property proofs on industrial strength designs and architectures Deep understanding of pipeline architectures, memory/DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms Confirmed understanding of formal verification technologies/abstraction techniques Experience in using EDA formal tools and tool development experience is a plus Proficiency in any scripting language with excellent debugging skills Extraordinary teammate with excellent interpersonal skills Passionate about developing world-class/innovative formal verification solutions
PREFERRED QUALIFICATIONS
Knowledge and experience in interpreting hardware specifications and using Temporal logic assertion-based languages such as SVA or PSL BS / MS / Ph.D in EE or CS is required.