Cookies & analytics consent
We serve candidates globally, so we only activate Google Tag Manager and other analytics after you opt in. This keeps us aligned with GDPR/UK DPA, ePrivacy, LGPD, and similar rules. Essential features still run without analytics cookies.
Read how we use data in our Privacy Policy and Terms of Service.
🤖 15+ AI Agents working for you. Find jobs, score and update resumes, cover letter, interview questions, missing keywords, and lots more.

Condor Computing Corporation • United States
Role & seniority: Senior Verification Engineer (Sr. DV Engineer)
UVM-based verification: testbenches, verification components, coverage
SystemVerilog, UPF (low-power)
Event-driven simulators
Scripting: Python, Ruby, or Perl
Formal verification processes
Automation tooling for testing
Architect and implement UVM-based testbenches and verification components
Conduct block-level verification and ensure compliance with requirements; develop and execute verification plans; define and analyze coverage
Architect/formal verification processes and create automation tools to streamline testing; perform testing for design performance evaluation
Bachelor’s or Master’s in Electrical/Electronic Engineering or Computer Science
8+ years in verification with testbench and verification component development in SystemVerilog/UVM
Experience with event-driven simulator-based modeling
Proficiency with UPF low-power techniques
Scripting skills (Python, Ruby, or Perl)
Strong understanding of chip/computer architecture
Strong written and verbal communication
Collaborative experience across sites and functions
Location & work type: Location/work type not specified; role appears to be full-time/permanent.
Condor Computing is a brand-new member of the RISC-V revolution. Condor is aiming to fly high by building the industry’s highest performance licensable RISC-V core. Our team of highly experienced CPU designers will create a new benchmark for power efficiency in high performance open-source computing.
We are pleased to announce that Condor is seeking a skilled and personable Sr. DV Engineer to become a valuable member of our team. In this position, you will have the opportunity to investigate innovative strategies to enhance the performance of our high-performance RISC-V processors, with a focus on all functions within the CPU core and memory systems. You will work collaboratively with a talented team, including engineers from RTL design, verification, and software groups, to propose enhancements, optimizations, and features based on performance assessments and PPA impact.
Architect and implement testbenches utilizing UVM-based methodologies Design and develop Verification Components using UVM-based techniques Conduct block-level verification to ensure optimal block performance and compliance with requirements Generate and execute verification plans based on specifications Define, implement, and analyze coverage metrics Architect and implement Formal Verification processes Create automation tools to streamline testing Perform testing for design performance evaluation
A Master's or Bachelor's degree in Electronic/Electrical Engineering or Computer Science 8+ years of experience in Verification Proven industry experience in developing testbenches and verification components with SystemVerilog and UVM from inception In-depth knowledge of event-driven simulator-based modeling techniques Experience with low-power implementation (UPF) Familiarity with scripting languages such as Python, Ruby, or Perl A comprehensive understanding of chip and/or computer architecture
Strong written and verbal communication abilities Exceptional collaboration skills across sites and functions
Condor Computing is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.
We look forward to reviewing your application! Show more Show less