Full Description

Design Verification Engineer (PCIe/USB IP Development)

Location: Bangalore

Experience: 5 Years

Education: B.E, M.E, M.Tech, B.Tech

Role

The candidate will be responsible for leading a team of engineers to verify design IP for PCIe/USB 3.X Device and Host Controller. Strong testbench development skills required to build a robust, scalable and efficient testbench to verify the IPs. Understand the design and come up with a detailed verification strategy and test plan. Manage project execution, schedules and work assignments of engineers in the team. Clearly communicate project status, issues, etc. The strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs and leading projects from concept to verification closure. System Verilog experience and experience with UVM based functional verification environment development is required. Experience working on verifying USB/PCIe Host and device controllers. AXI3/4/5 experience is desirable. Familiarity with using 3rd party VIPs. Team player with strong communication skills, and ability to work independently on the verification of a portion of the design. Prior experience in IP development teams would be an added advantage.

Job Description

5+year Experience Verification DDR/Ethernet/PCIe/CXL

Salary: Open