Full Description

Job Title

ASIC Digital Verification- Principal Engineer

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are

You are a highly experienced ASIC Verification professional, passionate about solving complex engineering challenges and driving technological excellence. With over 15 years of hands-on experience, you bring a deep understanding of functional verification methodologies, particularly in RTL-based IP Cores that power mission-critical applications in industries such as AI, automotive, and cloud infrastructure. Your technical acumen is matched by your ability to architect robust verification environments, make strategic decisions, and lead teams across global locations.

You thrive in dynamic, fast-paced settings, where collaboration and innovation are at the forefront. Your expertise spans across protocols like DDR, PCIe, AMBA, Ethernet, USB, and MIPI, and you are well-versed in UVM/VMM/OVM methodologies. You are not only proficient in SystemVerilog and object-oriented verification, but you also leverage scripting and programming languages (C/C++, TCL, Perl, Python) to drive productivity and efficiency. Your commitment to quality is unwavering, and you have a keen eye for detail, ensuring coverage-driven verification processes and assertion-based checks are meticulously implemented.

As a Principal Engineer, you are a natural mentor and technical leader, adept at guiding teams, making architectural decisions, and communicating complex ideas with clarity. You value continuous learning, embrace new challenges, and are motivated by the opportunity to work on cutting-edge IP Cores that define the next generation of smart devices. Your experience with functional safety standards (ISO26262, FMEDA) further strengthens your ability to deliver reliable and secure solutions for Synopsys’ global clientele.

What You’ll Be Doing

Architecting and making strategic decisions on test bench design for IP Core verification. Developing comprehensive verification plans and specifications based on functional requirements. Implementing robust test bench infrastructure and authoring advanced test cases using UVM/VMM/OVM. Driving a coverage-driven verification methodology to ensure thorough validation of IP functionality. Leading technical aspects of the verification team, mentoring junior engineers and collaborating internationally. Providing innovative verification solutions to enhance productivity, performance, and throughput. Engaging in assertion-based verification and coverage closure to guarantee high-quality deliverables. Collaborating with cross-functional teams on functional safety and compliance standards, such as ISO26262 and FMEDA.