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Infineon Technologies • Villach, Carinthia, Austria
Salary: 14 times p.a.
Role & seniority
Stack / tools
SystemVerilog, Universal Verification Methodology (UVM), Constrained Random verification
RTL/gate‑level verification
Cadence verification tools (Xcelium, vManager)
GIT, Python; additional programming languages a plus
Top 3 responsibilities
Create and define verification plans for digital verification of mixed-signal designs
Develop/update verification environments in SystemVerilog/UVM; execute tests on RTL/gate‑level; debug design and verification issues
Collaborate closely with analog and digital designers and other verification engineers; mentor junior colleagues, consultants, and students
Must-have skills
University degree in Electrical Engineering, Computer Science, Information Technology, or related field
3–5 years of relevant experience
Expert in UVM and SystemVerilog; solid RTL design (HDL) knowledge
Experience with Cadence verification tools (Xcelium, vManager) or equivalent
Proficiency with GIT; Python or other programming languages a plus
English fluency
Nice-to-haves
Additional programming language experience
Mentoring or coaching experience
Exposure to mixed-signal verification and cross-domain collaboration
Location & work type
Location: Austria
Employment type: full-time, salaried role under local collective agreement; salary paid 14× per year; compensation higher with stronger expertise/skills
#WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problem solvers behind tomorrow’s technology. As a Functional Digital Verification Engineer on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?
Key responsibilities in your new role Create and define verification plans, for digital verification of Mixed Signal designs Create new and improve existing verification environments in SystemVerilog language using Universal Verification Methodology (UVM) and Constrained Random approach Execute tests in these environments on RTL and gate-level and debug issues in design and verification environments Closely cooperate with analog and digital designers as well as concept and other verification engineers Mentoring of junior colleagues, consultants, and students
Your profile You work conscientiously on making things better, faster, and more efficient and keep up high quality standards for yourself and other people. You can solve technical problems and work independently. You are a team player and support your colleagues for the overall team and company success.
Qualifications and skills to help you succeed A university degree in Electrical Engineering, Computer Science, Information Technology, or a similar academic discipline Ideally 3-5 years of related work experience Excellent know-how with UVM, especially using System Verilog knowledge of RTL design (HDL) and digital or analog circuits knowledge of Cadence verification software (Xcelium and vManager) or similar knowledge of GIT, Python, and other programming languages as a plus Fluency in English We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.
#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?
We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels. We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.