Full Description

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are

You are a highly skilled and experienced ASIC verification professional with a passion for leading technical teams and driving excellence in digital design. Your depth of knowledge in verification methodologies, especially within DDR IP projects and serial interface protocols, sets you apart as a technical authority. You are adept at collaborating with cross-functional teams—architects, RTL designers, and program managers—to ensure every project not only meets but exceeds expectations for quality and innovation.

You thrive in dynamic, fast-paced environments, effortlessly balancing technical leadership with hands-on verification work. Your curiosity compels you to stay ahead of emerging technologies and industry best practices, and your commitment to mentorship empowers those around you. You naturally take ownership of complex verification deliverables, make data-driven decisions, and advocate for best practices throughout the design and verification process. Your communication skills are top-notch, enabling you to articulate complex technical concepts clearly to diverse audiences, which fosters a culture of transparency and continuous improvement.

With a background in Electrical or Electronics and Communication Engineering and substantial experience in ASIC verification, you are poised to make a significant impact at Synopsys. Your dedication to delivering robust, high-performance solutions will help shape the next generation of intelligent systems, making you a critical contributor to our mission.

What You’ll Be Doing

Technically leading and taking ownership of critical areas of verification, collaborating with a team of talented verification engineers. Specifying, designing, and implementing advanced verification environments for the DesignWare family of synthesizable IP cores. Performing verification tasks for IP cores, working closely with RTL designers and architects to ensure functional correctness and high-quality deliverables. Developing and executing comprehensive test plans and environments at both the unit and system levels to ensure thorough verification coverage. Coding and debugging complex test cases, including the creation and integration of sophisticated checkers and assertions using System Verilog/UVM. Extracting and reviewing functional and code coverage metrics, ensuring verification goals are met and maintaining rigorous quality standards. Managing regressions, analyzing results, and contributing to the continuous improvement of verification strategies and environments.

The Impact You Will Have

Enhance the quality and efficiency of verification processes, ensuring robust and reliable IP cores for our global customer base. Drive the development of cutting-edge technologies that power the Era of Smart Everything, from AI to automotive and beyond. Empower the creation of high-performance silicon chips and software content, fueling innovation across multiple industries. Collaborate within a global team of experienced verification engineers, fostering knowledge sharing and professional growth. Bolster Synopsys' industry leadership in chip design and software security by setting new standards in IP verification methodologies. Directly influence the success and reputation of the DesignWare IP Verification R&D team through technical excellence and innovation.

What You’ll Need

BS/MS in Electrical Engineering or Electronics and Communication Engineering with 3+ years of relevant experience. Demonstrated experience in technically leading teams for DDR IP projects, with a proven track record of successful collaboration and stakeholder management. Expertise in developing HVL (System Verilog/UVM) based test environments for complex ASIC designs. Advanced skills in creating and executing rigorous test plans, checkers, and assertions to ensure comprehensive verification. Proficiency in extracting and analyzing verification metrics such as functional and code coverage, driving quality metric attainment. Experience with serial interface protocols and IP design/verification processes; strong knowledge of DDR/LPDDR highly desirable. Hands-on experience owning end-to-end verification deliverables, including planning, execution, DV metrics closure, and review/signoff.

Who You Are

Collaborative leader who inspires and mentors team members to achieve their best. Analytical thinker with strong problem-solving skills and a commitment to quality. Exceptional communicator, able to bridge technical and non-technical stakeholders. Self-motivated and proactive, with a passion for continuous learning and professional development. Adaptable and resilient in the face of complex challenges and changing priorities.

The Team You’ll Be A Part Of

You will join the DesignWare IP Verification R&D team, a group of talented and passionate engineers committed to advancing Synopsys' leadership in semiconductor IP. The team focuses on delivering world-class verification solutions for a broad portfolio of synthesizable IP cores, leveraging the latest methodologies and technologies to ensure our products meet the most rigorous quality and performance standards. Collaboration, innovation, and a drive for excellence define our culture.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less