Design Verification Engineer - European Tech Recruit
Jobster • Cambridge, England, United Kingdom
Role & seniority: Senior CPU Design Verification Engineer – Cambridge (Onsite)
Stack / tools: SystemVerilog, UVM, assertions, coverage-driven verification; block/subsystem/chip level verification; reusable verification environments (stimulus, checkers, trackers, coverage); experience with RIS; familiarity with simulators, waveform viewers, and formal tools
Top 3 responsibilities
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Develop verification strategies, test plans, and coverage models; build scalable environments
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Execute verification plans (bring-up, regression, debugging) and track progress with coverage and bug metrics
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Own a block/functional domain and provide technical guidance to junior engineers
Must-have skills
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Strong CPU/microprocessor verification background
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Deep CPU microarchitecture knowledge (cache coherence, memory ordering, speculative execution, MMU/address translation)
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Proficiency in SystemVerilog, UVM, assertions, and coverage-driven verification
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Experience verifying designs at block, subsystem, and chip levels
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Experience with random instruction sequencing (RIS)
Nice-to-haves
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Experience leading/mentoring verification engineers
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Exposure to formal verification and/or post-silicon bring-up
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Familiarity with industry-standard simulators, waveform viewers, and formal tools
Location & work type
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Cambridge, UK – onsite
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Must have current valid authorization to work in the UK; no visa sponsorship available
Notes: Applications from those wit
Full Description
Senior CPU Design Verification Engineer - Cambridge (Onsite)
We are supporting a leading semiconductor technology organisation developing next-generation CPUs, GPUs, and low-power SoC platforms used across high-performance computing, consumer electronics, and wearable devices.
Role Responsibilities
Work closely with CPU and SoC Architects to understand architectural concepts and system-level requirements Develop detailed verification strategies, test plans, and coverage models Build scalable and reusable verification environments, including stimulus, checkers, assertions, trackers, and coverage Execute verification plans covering design bring-up, regression, and debug Track and report verification progress using coverage, bug metrics, and feature readiness Take ownership of a block or functional domain within the CPU design Provide technical guidance and support to junior verification engineers where required
Required Experience
Strong background in CPU or microprocessor design verification
Deep knowledge of CPU micro-architecture concepts such as
- Cache coherence
- Memory ordering & consistency
- Speculative execution
- Address translation / MMU
- Experience with random instruction sequencing (RIS)
- Proven ability to verify designs at block, subsystem, and chip level
- Proficiency in SystemVerilog, UVM, assertions, and coverage-driven verification
Desirable
Experience leading or mentoring verification engineers Exposure to formal verification and/or post-silicon bring-up Familiarity with industry-standard simulators, waveform viewers, and formal tools
In accordance with local employment laws, applicants must have current, valid authorisation to work in Germany at the time of application. We are unable to sponsor employment visas for this role. Applications from individuals without existing work authorisation for the UK cannot be considered.
If this sounds interesting and you'd like to learn more, click the link below to apply or email me with a copy of your CV on william@eu-recruit.com
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