Role & seniority: Design Verification Engineer, Mid-Senior level

Stack/tools: microprocessor verification; RIS; test plans, portable testbenches, transactors, assembly code; verification environments (stimulus generation, checkers, assertions, trackers, coverage models); simulators, coverage analysis tools, gate-level simulation, waveform viewers, formal verification tools; silicon bring-up familiarity

Top 3 responsibilities

Lead and mentor local Design and Verification teams; collaborate with CPU/SoC Architects
Create detailed test/coverage plans and scalable verification methodologies; build verification environments and testbenches
Execute verification tasks (design bring-up, environment integration, regression, debugging) and track DV progress with metrics (bugs, coverage)

Must-have skills

Deep microprocessor verification expertise (cache coherence, memory consistency, prefetching, branch prediction, speculative execution, memory management)
Experience with RIS; verification from block/unit to subsystem/chip level
Proven leadership of small verification teams; formal methods, assertions; silicon bring-up
Proficiency in test plan creation, portable testbenches, transactors, assembly code; diverse toolchain experience
Independent ownership of verification for a block or unit

Nice-to-haves

Broad verification toolset familiarity (simulators, coverage tools, gate-level sim, waveform viewers, formal tools)
Strong architecture

Full Description

We're partnered with a global leading semicon company who are looking for an experienced Design Verification Engineer to play a key role in validating CPU and SoC-level microarchitectures in collaboration with leading Chip Architects.

In this role, you’ll focus on verifying critical components of the CPU to ensure they're production-ready and meet the highest industry standards.

What You'll Be Doing

Leading and mentoring local Design and Verification teams.
Collaborating with CPU and SoC Architects to understand architectural concepts and system-level requirements.
Creating detailed test and coverage plans based on architectural and microarchitectural specifications.
Defining scalable and portable verification methodologies.
Building comprehensive verification environments, including stimulus generation, checkers, assertions, trackers, and coverage models.
Designing and implementing verification plans and testbenches tailored to your assigned functional domain.
Executing verification tasks such as design bring-up, environment integration, regression testing, and debugging.
Tracking and reporting DV progress using metrics such as bug counts and coverage statistics.

What We're Looking For

Strong expertise in microprocessor verification, including areas like cache coherence, memory consistency, prefetching, branch prediction, speculative execution, and memory management.
Experience with Random Instruction Sequencing (RIS) and verifying designs from block/unit level to subsystem/chip level.
Proven leadership in guiding small verification teams on CPU-related projects.
Familiarity with advanced verification techniques such as formal methods, assertions, and silicon bring-up.
Deep understanding of processor architectures and microarchitectures.
Proficiency in writing test plans, portable testbenches, transactors, and assembly code.
Experience with a variety of verification tools and methodologies, including simulators, coverage analysis tools, gate-level simulation, waveform viewers, and formal verification tools.
Ability to work independently and take ownership of verification for a design block or unit.

By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice https://eu-recruit.com/wp-content/uploads/2024/07/European-Tech-Recruit-Privacy-Notice-2024.pdf

Seniority level Mid-Senior level Employment type Full-time Job function Engineering Industries Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Software Development

Lead CPU Design Verification Engineer