Full Description

Director, ASIC Verification This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. Job Description: Strong focus on advanced silicon and system-level verification. Work consists of designing, developing, analyzing, troubleshooting, and debugging complex ASIC and SoC verification environments, system models, and methodologies. Supports development of products, services, and solutions within HPE’s networking portfolio. Requires deep expertise in hardware verification engineering disciplines, methodologies, and tools—including SystemVerilog, UVM, SystemC modeling, and hardware emulation platforms. Directs and manages a diverse team of senior verification engineers and architects responsible for ASIC/SoC verification strategy, methodology, planning, and execution. Responsible for setting the technical direction for functional verification, modeling frameworks, and emulation acceleration strategies across the organization. Ensures alignment of verification strategy with product architecture and functional goals. Responsibilities Provides direct and ongoing strategic leadership for a verification team consisting of multiple managers and senior technical leaders focused on ASIC/SoC verification using SystemVerilog, UVM, SystemC modeling, and emulation platforms. Drives creation and deployment of scalable, reusable verification architecture, methodologies, and infrastructure for complex ASIC programs. Creates strategic and tactical resource plans, verification roadmaps, milestones, and priorities for assigned teams based on product architecture, schedules, and technology needs. Ensures high-quality, comprehensive verification coverage—including functional, power, performance, and system-level validation. Defines and oversees SystemC/TLM modeling strategy to enable early firmware development; ensures tight coupling between virtual models and RTL verification environments. Leads emulation and acceleration initiatives to improve verification throughput and software validation readiness; partners with pre-silicon firmware and validation teams. Manages headcount, schedules, costs, and deliverables while driving continuous improvement in verification efficiency, automation, coverage closure, and reuse. Collaborates closely with architects, RTL design leads, program management, validation, and system engineering to communicate verification status, escalate issues, and drive cross-functional decisions. Manages relationships with EDA vendors, emulation platform providers, and global development partners Identifies opportunities for verification flow innovation, methodology improvements, and productivity enhancements. Provides overall people-care management including hiring, talent development, performance planning, coaching, and organizational skill evolution. Education and Experience Required First-level university degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience required; advanced degree preferred. Typically 15+ years of ASIC/SoC design and verification experience, including: 10+ years of people management, leading large verification or silicon teams. Proven experience directing complex verification programs at scale. Deep hands-on expertise in SystemVerilog, UVM methodology, and SystemC/TLM modeling. Experience with hardware emulation platforms (e.g., Palladium, Veloce, ZeBu) strongly preferred. Networking experience is desirable. Knowledge and Skills Strong leadership capabilities with demonstrated ability to lead senior technical talent and large engineering organizations. Expert knowledge of ASIC/SoC verification methodologies, coverage-driven verification, constrained random testing, testbench architecture, and modeling. Strong understanding of silicon development flows from architecture to tape-out and post-silicon bring-up. Proven experience with emulation/acceleration workflows, including co-modeling with software teams. Excellent organizational, strategic planning, and budget management skills. Ability to effectively manage geographically distributed teams and external partners. Advanced communication skills for technical and executive audiences. Strong business acumen with the ability to influence silicon product strategy. Advanced relationship management skills, especially in cross-functional and executive engagement. Additional Skills: Accountability, Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management (Inactive), Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity (Inactive), Long Term Planning, Managing Ambiguity {+ 5 more} What We Can Offer You: Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division. Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. Let's Stay Connected: Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE. #unitedstates #executive, #networking Job: Engineering Job Level: Director "The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 183,000 - 389,500 in California The listed salary range reflects base salary. Variable incentives may also be offered." Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity. Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities. HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories. 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