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Cisco • Belgrade, Central Serbia, Serbia
Role & seniority: Senior Digital Logic Verification Engineer (5+ years)
Stack/tools: SystemVerilog, UVM, DV infrastructure, emulation, simulation; familiarity with block/cluster/top-level verification
Implement and evolve DV infrastructure for block, cluster, and top-level environments
Maintain existing DV environments and enhance verification coverage through code and functional review
Collaborate with architects/designers to ensure verification completeness; support emulation-tested tests; contribute to post-silicon validation prep
5+ years in digital logic design verification
Advanced SystemVerilog and UVM proficiency
Strong debugging skills pre-silicon and in-lab
Scripting abilities
System integration knowledge (AMBA, PCIe, SPI, I2C, JTAG, CPU)
Basic software knowledge (driver level) and basic design knowledge
Location & work type: Serbia-based; full-time role with global collaboration and various development stages (architecture discussions to emulation/simulation)
Meet the Team
Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust.
Your Impact
Implementation of DV infrastructure for block, cluster, and TOP-level environments. Maintaining existing DV environments and enhancing them. Ensuring complete verification coverage through implementation and review of code and functional coverage. Working closely with architects and designers to ensure verification completeness. Supporting tests done with emulation. Engage in tasks to prepare for post-silicon-validation.
Minimum Requirements
5+ years’ experience in digital logic design verification Advanced knowledge of SystemVerilog and UVM Advanced debug skills pre-silicon and in-lab
Preferred Requirements
Scripting abilities System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU) Basic SW knowledge (chop driver level) Basic design knowledge
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.