Role & seniority: Senior Manager / Validation Engineering

Stack/tools

DDR4/DDR5 memory interfaces, SERDES, high-speed signaling
Bench validation, ATE/System testing, lab automation
Python for validation automation and data analysis
Validation methodologies, test equipment sourcing, PCB fabrication/assembly

Top 3 responsibilities

Lead cross-functional validation efforts, own and continuously improve validation methodologies to boost coverage and time-to-market
Manage bench validation team; execute bench validation and characterization of memory buffer chips (hands-on)
Collaborate with Design, Architecture, Verification, and Operations; coordinate with external partners to deliver high-quality buffer chip products

Must-have skills

Bachelors or MS in Electrical Engineering; 10+ years experience including exposure to DDR4/5
Experience simulating high-speed memory (DDR4/5) and/or SERDES interfaces
Bench testing experience; knowledge of ATE/System Testing a plus
Proven project planning, resource allocation, and budgeting
Validation methodology development and test plan creation
Knowledge of processor/memory device architecture
Expert Python programming for validation automation and data analysis

Nice-to-haves

Track record of growing organizations
Experience with lab automation software development
Experience sourcing/test equipment, PCB manufacturing/assembly collaboration

Location & work type

Full Description

Senior Manager Validation Engineering

Location: San Jose-CA or Atlanta-GA (USA)

As Validation Manager you will manage and cooperate with the team to validate and characterize the product to deliver high-quality buffer chip products. You will have experience with processor-memory interfaces, including DDR topologies and protocols, as well as high-speed signalling, including signal integrity and power integrity concepts.

Responsibilities

Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, and procurement experts
Own, develop and continuously adapt and improve validation methodologies and technologies to continuously improve design validation coverage and time-to-market
Partner with Design, Architecture, Verification, and Operation teams to deliver high-quality buffer chip products
Work with external partners in sourcing test equipment, PCB manufacturing and assembly.
Manage bench validation team to execute bench validation and characterization of memory buffer chips.
Hands-on execution bench validation and characterization, and software development for lab automation.

Qualifications

Bachelors or M.S. degree in Electrical Engineering with 10+ years of industry experience in which at least a few years with exposure to DDR4/5.
Prior experience in simulating high speed memory (DDR4, DDR5) and/or SERDES interfaces is required.
Experience in Bench testing, with knowledge and experience on ATE or/and System Testing is a plus.
Track record of growing organizations with focus on organization and validation methodology development.
Demonstrated ability with project planning, resource allocation, capital and operational budgeting and Develop test methodologies for validating silicon designs against specifications.
Knowledge of processor / memory device architecture and specifications.
Expert on Python programming, focused on validation characterization automation, and data analysis.

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Senior Manager of Validation Engineering (High Speed Memory)