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Apple • Beaverton, Oregon, United States
Role & seniority: Design Verification Engineer (senior level); part of the silicon engineering team; 10+ years experience typically required.
Stack/tools: ARM-based CPU auxiliary features (Power Management, Clock Control, Debug Infrastructure, Resets, Special-Purpose Registers); Assembly, SystemVerilog, SVA, C++, scripting (Perl/Python); verification infra (checkers, transactors, coverage monitors); pre-silicon test planning, emulation, FPGA environments; waveform/trace tools; UPF/low-power and AXI familiarity; UVM and random constraint verification.
Verify functionality correctness of CPU Power Management, clock control, and debug logic across pre- and post-silicon stages.
Develop/execute test plans and schedules; build and maintain verification infrastructure; analyze functional coverage and ensure plan completeness.
Identify root causes, drive fixes with RTL teams; support SoC-level debug and silicon bring-up across emulation, FPGA, and silicon; contribute to post-silicon debugging.
BS degree and 10+ years’ relevant experience; programming in Perl/Python or SystemVerilog.
Experience in processor or power management architecture and verification; AXI/system fabric protocols; UVM-based environments; random constraint verification; SVA.
Ability to work independently, create/follow schedules, and communicate complex issues clearly.
Summary
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!
In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Description
We are seeking a highly motivated Design Verification Engineer to join our silicon engineering team focused on the auxiliary features of a high-performance ARM-based CPU. These features include Power Management, Clock Control, Debug Infrastructure, Resets, and Special-Purpose Registers—spanning both ARM-standard capabilities and Apple-specific innovations.
You will work across the entire product lifecycle, from pre-silicon test planning to supporting post-silicon bring-up and debug when needed. This role is highly cross-functional, bridging CPU and SoC teams, and is critical to delivering robust, low-power, high-performance CPU designs. Work closely with architecture and RTL designers on verifying the functionality correctness of CPU Power Management, clock control, and debug logic Develop and execute test plans and schedules Write and debug tests in Assembly, SystemVerilog, SVA, C++, and scripting languages to validate functionality in simulation, emulation, and FPGA environments Build and maintain verification infrastructure, including checkers, transactors, and coverage monitors. Analyze functional coverage to ensure test plan completeness Identify, root-cause, and document design issues and collaborate with RTL teams to drive fixes Support SoC-level debug for clock and power integration issues Work with silicon bring-up teams to develop tests and debug issues across emulation, FPGA, and silicon. Contribute to post-silicon debug, using waveform and trace tools to diagnose complex system issues.
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience Programming skills in Perl/Python or SystemVerilog
Preferred Qualifications
Experience in processor or power management architecture and verification Experience with system fabric protocols such as AXI In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches Experience in system Verilog assertions or silicon bringup or UPF and low power simulation Experience in processor debug features including hardware trace is a plus Experience with advanced verification techniques such as formal verification is a plus Advanced programming skills such as object orientated programming or CPU assembly language is a plus Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
Apple accepts applications to this posting on an ongoing basis.