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IP EDA & Automation Engineer

Arm Austin, Texas, United States

hybridfull-time

Salary: $241,100 - $326,100 / year

Posted Feb 10, 2026Apply by Apr 19, 2026

Role & seniority: Principal Engineer, IP Qualification (IP design/verification leadership)

Stack/tools: Arm IP Qualification flow; EDA tools from major providers; Verify-IP; RTL linting, CDC/RDC, synthesis and low-power (UPF) flow; scripting (Shell, TCL, Python)

Top 3 responsibilities

  1. Install and verify TPIP EDA models to meet Arm SoC flow and DFX requirements; align with verification standards

  2. Analyze deviations, coordinate reviews with SoC teams, and report issues to IP providers for updates

  3. Propose and lead new checks to improve coverage and ensure receivables’ compliance with SoC flow and DFX

  • Must-have skills: 18+ years post-master in IP design/verification/implementation/signoff; expert in at least two areas such as functional verification, RTL linting/CDC, scan/ATPG, synthesis and UPF-based power signoff, physical checks; scripting ability; strong collaboration and IP/SoC flow knowledge; experience with Verify-IP for interface IP protocols

  • Nice-to-haves: boundary scan (IEEE-1149), SI/PI checks (chip/package), power grid integrity, electro-migration/voltage-drop analysis, functional safety and cybersecurity requirements, experience with IP verification of interfaces, automation scripting across workflows

  • Location & work type: Austin, Texas; hybrid work arrangement with role-based flexibility

Full Description

Overview

Arm teams develop groundbreaking Silicon demonstrators which embeds the latest Arm Compute Sub-System IP (Intellectual Property) and other various outsourced IP. We are looking for a creative and hardworking principal engineer to join the IP Qualification team to verify these Third-Party IPs before they are embedded in SoC. Such TPIP are foundation IP (e.g. standard-cells, SRAM), NVM (e-fuse, anti-fuse), PLL, sensors, as well as sub-system Interfaces (controller + PHY) like LPDDR, USB, Ethernet or PCIe. You will join a newly formed team in Austin as well as collaborate with multiple other groups inside of Arm.

Responsibilities

For a Silicon demonstrator, you will lead the installation and the verification of all the TPIP EDA models to ensure they are in line with the Arm SoC design flow requirements, and they adhere to DFX (Design for Test, Debug, Reliability, Manufacturing and Yield) requirements as defined by Arm. For that, you will use the IP Qualification flow along with the EDA tools from major providers. You will analyze the deviations and share them with the SoC design teams for review and eventually report them to the IP providers for update. As a senior engineer, you will propose and lead the implementation of new checks to improve the coverage and to better ensure the compliance of the receivables with SoC flow and DFX.

Required Skills And Experience

At least 18 years of post-master degree work experience in IP design or verification and/or implementation and signoff.

At least two of the following experiences are required

“Nice To Have” Skills and Experience : In Return

Functional verification of IP blocks/subsystems. RTL code Linting and CDC/RDC verification. Scan stitching, ATPG and patterns simulation. Synthesis, lowe-power (UPF) physical implementation and verification, timing and power signoff. Power grid integrity (electro-migration, voltage-drop) and physical checks. Scripting for tasks automation with Shells (e.g. Bash), TCL, Python or any other language. Excellent interpersonal skills, strong initiative and open in engaging and learning various IP and the SoC reference design flow. Experience in Verify-IP usage for Interface IP protocol verification. Boundary scan integration (IEEE-1149). SI/PI (signal/power integrity) checks at chip/package level. Functional Safety and Cyber Security requirements.

We have a friendly and high-performance working environment, where Arm offers a competitive benefits package in Austin including: private medical insurance (employee and family), 20 days annual leave, 20-day sabbatical every four years, supplementary pension and reduction in working hours.

Building the Future with a 10x Mindset

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Salary Range: $241,100-$326,100 per year

We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

IP QualificationEDA ModelsSoC Design FlowDFX RequirementsEDA ToolsRTL LintingCDC/RDC VerificationScan StitchingATPGSynthesisLow-Power (UPF)Timing SignoffPower Grid IntegrityShell ScriptingTCLPythonmulti-location

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