Full Description

Job Title

Architect - High Speed Interface Pre-Silicon Validation Emulation Specialist

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are

You are a driven and insightful Emulation Expert, passionate about pushing the boundaries of what's possible in ASIC digital design. With a deep understanding of IP interfaces--especially PCIe and DDR--you are skilled in leveraging advanced emulation platforms like Zebu to accelerate verification and product development. Your career is marked by a proven ability to deliver robust, production-ready IP through rigorous emulation and verification cycles. You thrive in highly collaborative, matrixed, and international environments, bringing together diverse teams and perspectives to solve complex challenges.

Your hands-on approach and proactive attitude make you a go-to resource for bridging gaps between Emulation IP and Design IP, ensuring seamless integration and verification of both Controller and PHY components. You have a keen eye for detail and are committed to right-first-time development, always ensuring traceability and completeness across verification requirements. You stay ahead of industry trends, standards, and evolving technologies, and are adept at translating these into actionable insights for your teams. As an excellent communicator and natural collaborator, you are comfortable working with multiple stakeholders and driving change within the organization. Your adaptability, resilience, and commitment to continuous learning set you apart as a leader in your field.

What You'll Be Doing

Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains. Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance. Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies. Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams. Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality. Collaborating cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals. Mentoring and guiding junior engineers, fostering a culture of innovation and continuous improvement.