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Centraprise • Mountain View, California, United States
Role & seniority: Senior Functional Post-Silicon Validation Engineer (PCIe Gen6/Gen7)
Stack/tools: PCIe architecture (Gen5 required; Gen6 preferred; Gen7 a plus), LTSSM, PAM4, FLIT mode, FEC, AER/ECRC/NAK, TLP/DLLP, link training, PCIe protocol analyzers, Python-based automation, regression suites; experience with Switches/Retimers; debug at register level; server/platform exposure is a plus
Lead post-silicon bring-up and functional validation of PCIe Gen6/Gen7 Switch and Retimer devices
Design/execute functional validation test plans (LTSSM, link init, equalization, configuration space, capabilities)
Verify data path, error handling, power management, interoperability, and drive silicon fixes with RTL/firmware teams
Deep PCIe expertise (Gen5 required; Gen6 preferred; Gen7 a plus)
Hands-on debugging of LTSSM, link training, enumeration, and data-path issues
Experience validating PCIe Switches/Retimers; strong protocol knowledge (TLP/DLLP, flow control, credits, config space)
Automation proficiency (Python) and development of validation frameworks/regression suites
Experience with Gen6/Gen7 PAM4, FLIT mode, and FEC
CXL over PCIe Gen6 familiarity
Server/platform validation, emulation/pre-silicon environments, interoperability/ compliance activities
Location & work type: Colorado Springs, CO; W2 contract; onsite only
Note: Equal opportunity employer; U.S. work authorizat
Senior PCIe Gen6/Gen7 Functional Post-Silicon Validation Engineer Colorado Springs, CO W2 Contract
Complete Onsite role
Education: Bachelor’s or Master’s degree (B.E./B.Tech/MS) in Electronics, Electrical, or Computer Engineering
· Silicon Bring-up: Lead the post-silicon bring-up and functional validation of PCIe Gen6/Gen7 Switch and Retimer devices.
· Test Plan Development: Design and execute comprehensive functional validation test plans covering LTSSM state transitions and link initialization.
· Protocol Validation: Validate equalization protocols (including Gen6/Gen7 PAM4 flows), configuration space, and capability structures.
· Data Path & Traffic: Verify flow control, credit management, and data path integrity across posted, non-posted, and completion packets.
· Error & Power Management: Validate error handling (AER, ECRC, NAK/Replay, timeouts) and power management states (ASPM, L1 substates).
· Switch Architecture: Test multi-port and multi-host configurations specifically for Switch devices.
· Advanced Feature Validation: Verify Gen6/Gen7 architectural innovations including FLIT mode operation, PAM4 functional behavior, FEC (Forward Error Correction), and enhanced error containment.
· Interoperability: Conduct rigorous interoperability testing with diverse PCIe ecosystem devices.
· Advanced Debugging: Root-cause functional issues using PCIe protocol analyzers, register-level debugging, trace buffers, and internal debug hooks.
· Automation: Develop Python-based automation frameworks and regression suites to streamline validation cycles.
· Issue Resolution: Drive silicon fixes by collaborating with RTL and firmware teams while documenting test results and coverage.
· PCIe Expertise: Deep understanding of PCIe architecture; Gen5 experience is required, with Gen6 preferred and Gen7 a plus.
· Hands-on Debugging: Proven track record debugging LTSSM failures, link training issues, enumeration problems, and transaction layer/data path bugs.
· Device Experience: Specific experience in the validation of PCIe Switches or Retimers.
· Protocol Knowledge: Strong command of TLP/DLLP structures, flow control, replay buffers, credit logic, and configuration registers.
· Automation: Professional experience in validation automation using Python.
· Advanced Technology: Experience with FLIT mode and PAM4-based architectures (Gen6/Gen7).
· CXL Knowledge: Familiarity with the CXL protocol, particularly over PCIe Gen6.
· Platform Exposure: Experience in server platform validation and exposure to emulation or pre-silicon verification environments.
· Compliance: Experience managing interoperability events or functional-focused compliance workshops.
Please note – Centraprise is an equal opportunity employer. Applicants must be authorized to work in the U.S.
U. S. Citizens and Green Card holders are strongly encouraged to apply.
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