Full Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

SENIOR HSIO Validation Engineer

The Role

We are looking for a dynamic, energetic and passionate technical leader to join our growing datacenter CPU post silicon validation team, in particular in the areas of highspeed IO such as PCI Express, multi-socket, UCIe and Compute Express Link (CXL). As a key contributor to the success of AMD’s product, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The Systems Design Engineering and validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

Key Responsibilities

Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products in the area of high speed IO Develop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup) Test interactions between various SoC features using validation infrastructure Debug and drive root-cause analysis for SoC related issues Collaborate with cross-functional teams in developing tools to improve SoC validation and debug Work with cross-functional teams to improve post-silicon validation test strategy, methodology, and process Represent AMD in industry consortium and conferences

PREFERRED EXPERIENCE

Proven leadership and managerial experience in soc design or validation Has experience in CXL and/or PCIe interface in either electrical or functional or both. Understanding of modern x86 microprocessor architecture and Server platform architecture is highly desired Experience developing validation methodologies and infrastructure Test plan and workload development experience Participated in silicon bring up and debug, support to internal engineering teams Able to execute and drive success of programs with multiple projects on the go Debug skills at both SoC and system level Familiarity with programming / scripting language (C/C++, Python, Perl, ...) Working knowledge of Server OSes (Linux, Windows) Must be a self-starting team player with excellent communication skills who can work with minimal guidance Forward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement Strong verbal and written English communication skills Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc. Extensive experience with board/platform-level debug, including delivery, sequencing, analysis, and optimization Extensive knowledge of system architecture, technical debug, and validation strategy Strong analytical/problem-solving skills and pronounced attention to details