🤖 15+ AI Agents working for you. Find jobs, score and update resumes, cover letter, interview questions, missing keywords, and lots more.
Cookies & analytics consent
We serve candidates globally, so we only activate Google Tag Manager and other analytics after you opt in. This keeps us aligned with GDPR/UK DPA, ePrivacy, LGPD, and similar rules. Essential features still run without analytics cookies.
Read how we use data in our Privacy Policy and Terms of Service.
🤖 15+ AI Agents working for you. Find jobs, score and update resumes, cover letter, interview questions, missing keywords, and lots more.
Microsoft • Redmond, Washington, United States
Salary: $139,900 - $274,800 / year
Role & seniority: Principal Design Verification Engineer (AISiE – AI Silicon Engineering, SoC Design Verification)
Stack/tools
Hardware/verification: SystemVerilog, UVM; Verilog/VHDL; testbenches, scoreboards, sequences, assertions, functional coverage
languages & scripting: C/C++, Python, Ruby or Perl; Makefiles; custom scripts
environments: pre-silicon block/chip/system verification; post-silicon validation; emulation and hardware/FPGA support
methodologies: Agile (code reviews, sprint planning, frequent deployments)
Top 3 responsibilities
Create complex verification environments and tests; develop reference models; perform pre-silicon and post-silicon validation
Define verification strategy, plans, environments, tests, and coverage for IP/SS/SOC levels; drive test development for feature coverage
triage/debug testbenches, simulation, and emulation fails; develop verification components and scalable automation
Must-have skills
Advanced degree requirement (PhD with 3+ yrs, or MS with 6+ yrs, or BS with 8+ yrs) in EE/CE/CS or related field; equivalent experience
5–9+ years in chip/computer architecture; extensive experience with Verilog/VHDL, SystemVerilog, UVM, and coverage closure
Proven ability to create simulation environments, tests, and debugging across multiple silicon IPs; hardware design/embedded systems experience
Firmware/development experience (secure/non-secure boot), hardware emulation/FPGA familiarity; synt
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. The AI Silicon Engineering (AISiE) SoC Design Verification team is seeking passionate, driven, and intellectually curious silicon verification engineers who can work with cross-discipline teams (including systems, firmware, architecture, design, validation, and product engineering) to develop environment and test cases to verify Microsoft’s latest AI accelerators. We are looking for a Principal Design Verification Engineer to join the team.
Responsibilities Creation of complex verification environments and tests, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation. Interact with architects and design engineers to create verification plans covering strategy, test environments & tests, and verification requirements for IP/SS/SOC level verification. Create and drive test-plans and test development to provide complete features coverage. Develop and implement technical solutions to complex quality and design challenges. Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage. Triage and debug testbench, simulation, and emulation fails. Develop Makefiles and scripts for scalable and efficient verification Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment. Collaborate with teams across sites and geographies.
Qualifications Required/minimum qualifications Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $139,900 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
https: //careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.