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Microsoft • Mountain View, California, United States
Salary: $139,900 - $274,800 / year
Role & seniority: Principal Design Verification Engineer (senior/principal level)
Stack/tools: Silicon/SoC design verification; Universal Verification Methodology (UVM); C++ (testbenches), RTL debugging; simulation/emulation; Python/Perl scripting; makefiles/scripts for verification; test plans, scoreboards, checkers, assertions; verification infrastructure
Define and implement verification strategy, test plans, environments for IP/SoC verification; develop and execute constrained-random stimulus, scoreboards, checkers, and assertions
Develop and integrate UVM components; drive functional coverage and coverage closure; triage and debug testbench, simulation, and emulation failures
Provide technical leadership and mentorship; collaborate across verification teams; support Agile processes and cross-functional development
Advanced degree in EE/CE/CS or related field with required experience (PhD with 3+ yrs, MS with 6+ yrs, or BE with 8+ yrs, or equivalent)
9+ years (preferred) in design verification; track record delivering high-performance IP/SS/SoC verification
Experience with UVM, C++, RTL debugging, verification across product cycles; scripting (Python/Perl); testplan/Testbench development; coverage-driven verification
Leadership across cross-functional/time-zone teams; familiarity with AI/ML SoCs (preferred)
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Principal Design Verification Engineer to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Artificial Intelligence System on Chip (AISoC) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Principal Design Verification Engineer with a passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Design Verification Engineer to join the team.
Responsibilities The AISoC silicon team is seeking a Principal Design Verification Engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom Intellectual Property (IP) and System on Chip (SoC) designs that can perform complex and high-performance functions in an extremely efficient manner. Interact with architects and design engineers to create testplans covering verification strategy, test requirements, and test environments for IP- or SS-level verification. Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments. Collaborate across verification teams on vertical and horizontal reuse of components. Define and implement functional coverage and drive coverage closure. Triage and debug testbench, simulation, and emulation fails. Write makefiles and scripts for verification infrastructure. Apply Agile development methodologies including code reviews, sprint planning, and feature deployment. Provide technical leadership through mentorship and strong teamwork.
Qualifications
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $139,900 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
https: //careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.