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Apple • London, England, United Kingdom
Do your life’s best work here - with the whole world watching. At Apple, new ideas and complex challenges have a way of becoming phenomenal products, services, and customer experiences very quickly. You will join the growing team at our UK GPU design centre, contributing to the p
Do your life’s best work here - with the whole world watching. At Apple, new ideas and complex challenges have a way of becoming phenomenal products, services, and customer experiences very quickly. You will join the growing team at our UK GPU design centre, contributing to the pre-silicon RTL verification of blocks in high performance 3D graphics processor microarchitectures targeted for low power mobile devices and high-performance personal computers. This includes deep understanding of the micro-architectural details of each block and how it works within the broader GPU design. A strong graphics or computer architecture background, and foundation in digital design techniques and a preferred background in verification methodology will be used to close testing coverage with high confidence.
DESCRIPTION
As a Graphics Design Verification Engineer at Apple, you’ll be responsible for ensuring the exceptional quality of complex graphics IP designs. You will collaborate with multi-functional teams to tackle new challenges, requiring robust written and verbal abilities. Using SystemVerilog, UVM, C++, and scripting languages, you will develop test benches, generate tests, run and debug simulations to drive our complex graphics IPs to high-quality closure. As you progress, you’ll take on increasing responsibilities within the team, including creating and executing verification plans and negotiating program objectives with Architecture, Design, and Software teams.
MINIMUM QUALIFICATIONS
BS/MS/PhD in Computer Engineering, Electronic Engineering or related field Strong knowledge of computer architecture, general purpose microprocessor or memory sub-system micro-architecture in lieu of graphics experience SystemVerilog, C++, Python Excellent planning, collaboration and communication skills Fluent in English
PREFERRED QUALIFICATIONS
Prior DV or Design contribution to complex IP at Unit, Sub-system, or Top-level Knowledge of verification languages and methodologies