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Qualcomm • San Diego, California, United States
Role & seniority: GPU Post-Silicon Engineering (PSE) Engineer; mid-to-senior level (supports next-gen mobile graphics core).
Stack/tools: Emulation and silicon environments; post-silicon bring-up; functional/mixed-signal IP validation; debugging tools (JTAG, kernel debuggers); C/C++/Python; Verilog/SystemVerilog knowledge; GPU/SoC architectures; GPU APIs (Direct3D/OpenGL/OpenCL); Android and Windows HLOS familiarity.
Improve post-silicon validation coverage and test methodologies; create GPU bring-up test plans validating electrical and functional features.
Collaborate with GPU architects, designers, verification, and graphics driver engineers to validate/productize graphics core.
Provide debug analysis, support, and solutions for silicon issues from internal to OEM levels.
Degree: BS in CE/CS/EE or relevant + 4+ yrs (or MS + 3+ yrs, or PhD + 2+ yrs).
Experience in emulation/silicon environments; functional validation and debug of mixed-signal IP; post-silicon enablement.
Strong communication and teamwork; English (and Mandarin) fluency.
5+ years GPU/debug experience in emulation or silicon; extensive functional validation; debugging low-level firmware/software; driver–GPU interaction.
Test planning/methodologies; JTAG and kernel debuggers; familiarity with Verilog/SystemVerilog; Android/Windows HLOS; C/C++/Python; basic Verilog/VHDL; knowledge of GPU APIs and mobile/PC grap
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