
CPU Design Verification Engineer
Apple • Santa Clara, California, United States
Role & seniority: CPU Verification Engineer; mid-to-senior ownership of a functional area of a CPU design
Stack/tools: C/C++, Verilog; assembly; test plans/testbenches; vectors; coverage monitors; checkers; C-based transactors; (preferred) formal verification and assertions
Top 3 responsibilities
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Verify functionality correctness with architecture and RTL designers
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Develop and lead test plans and test environments
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Develop complex tests (assembly, C, vectors), coverage analysis, and checkers/transactors
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Must-have skills: BS in digital logic design, chip architecture, or microarchitecture; proficiency in C/C++ and Verilog
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Nice-to-haves: Formal verification and assertions knowledge; silicon bring-up understanding; experience developing testplans/testbenches, C-based transactors, and assembly-based tests; strong teamwork and communication; ability to work independently
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Location & work type: Not specified in the provided text
Full Description
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it! Join us to help deliver the next groundbreaking Apple product. In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
DESCRIPTION
As a CPU Verification Engineer owning the verification of a certain area of
functionality in a CPU design, you will have the responsibilities as follows: • Work closely with architecture and RTL designers on verifying the functionality correctness of the design • Develop and lead test plan and test environments • Develop complex tests in assembly, C, or vectors according to test plans • Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered • Develop checkers or C-base transactor to verify the design
MINIMUM QUALIFICATIONS
Minimum BS Academic experience in digital logic design, chip architecture, and microarchitecture Experience with C/C++ programming and Verilog
PREFERRED QUALIFICATIONS
Knowledge of advanced verification techniques such as formal and assertions Understanding of silicon bring-up process Experience with the development of testplans/testbenches, C-based transactors, and writing/debugging assembly-based tests Should be a great teammate with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design