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Lead MTS Design Verification Engineer - PCIe Controller products

Rambus Sofia, Sofia-City, Bulgaria

hybrid
Posted Aug 3, 2026
  • Role & seniority

    • Mid to Senior-level Design Verification Engineer (Individual Contributor)

    • Pre-silicon RTL verification for PCIe Controller SoftIP; PCIe Express IP Products team

  • Stack/tools

    • SystemVerilog / UVM testbench

    • Verilog/SystemVerilog RTL familiarity

    • Verification scripting: Python and TCL (preferred)

    • (Implied) Testbench/test sequence development, functional coverage coding, regression/debug tooling within verification environment

  • Top 3 responsibilities

    • Develop testbenches and test sequences for PCIe/CXL controller features

    • Plan and implement functional coverage (coverage planning, coverage item coding, test suite expansion)

    • Build/maintain regression tests and perform debug/triage/corrections for test environment and RTL issues

  • Must-have skills

    • 5–7+ years HDL design verification experience

    • Strong SystemVerilog and/or UVM verification skills

    • RTL familiarity with Verilog/SystemVerilog

    • Ability to write and iterate on verification test suites, sequences, and debug workflows

  • Nice-to-haves

    • Experience/familiarity with PCIe Express and/or CXL/IO controller technologies

    • Practical scripting with Python and TCL

  • Location & work type

    • Sofia, Bulgaria

    • Full-time, hybrid: average ~3 days/week onsite, ~2 days remote (office-based)

Full Description

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional mid to senior-level individual contributor Design Verification Engineer to join our PCIe Express IP Products team in Sofia, Bulgaria. The successful candidate will participate in pre-silicon RTL Verification activities related to PCIe Controller SoftIP development, on leading-edge PCI-Express and CXL controller technologies. This is a Full Time position, reporting to the local onsite Verification management. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite while also allowing for two days of remote work. Responsibilities

Duties in this position will include

  • Testbench and test sequence development for verification of new controller technologies and features
  • Functional coverage planning, coverage item coding, and test suite augmentation to achieve Functional Coverage
  • Regression test development, monitoring, debug/triage, and correction to test environment, sequences, debug of controller RTL design
  • Development & support of Verification environment scripting and capabilities
  • Qualifications
  • Bachelors Degree or above in EE/CS, at least 5-7 years prior experience with HDL logic Design-Verification
  • SystemVerilog and/or UVM testbench, Verilog/SystemVerilog logic design, /RTL familiarity/project work
  • Pre-existing Experience / familiarity with one or more I/O controller technologies such as PCI-Express, is highly desireable
  • Working experience with Python and TCL scripting languages preferred
  • About Rambus
  • Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.
  • Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits.
  • At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work.
  • Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
  • Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
  • Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
  • For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.
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Design VerificationPCIeSystemVerilogUVMRTLCXLPythonTCLLogic DesignFunctional CoverageTestbench DevelopmentRegression TestingDebuggingSemiconductorIP Developmentmulti-location

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