
Senior Validation Engineer
Microsoft • Mountain View, California, United States
Salary: $119,800 - $261,000 / year
**Role & seniority: ** Senior Validation Engineer (Silicon Engineering IC4), Post-Silicon Validation; part of Microsoft AI System on Chip (AISoC) Silicon Org.
**Stack/tools: ** Validation strategy & test methodology; validation environments and debug boards; develops test content/scripts/tools and hardware/software verification collateral. Debug/measurement tools preferred: trace/JTAG/on-chip debug, protocol analyzers, bit error rate testers, logic analyzers, high-speed oscilloscopes. Board-level understanding; system firmware/software knowledge (preferred).
**Top 3 responsibilities: **
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Define validation strategy/requirements, environments, and tools; write test plans and implement tests (content/scripts/collateral) including debug-board and HW/SW requirements.
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Execute post-silicon validation: run tests, triage and debug functional/electrical/high-speed/memory/power/performance issues.
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Collaborate with architects/logic/verification/IP/tool providers; drive improvements to prevent bugs earlier; provide technical guidance/mentorship.
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Must-have skills:
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Strong validation principles/techniques; ability to author test plans and build verification assets.
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Proficiency executing silicon validation and performing failure triage/debug.
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Cross-functional communication and technical leadership.
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Eligibility for required background/security screenings.
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Nice-to-haves:
- Leadership; success in cross-disciplinary taskforce
Full Description
Overview
The Artificial Intelligence Silicon Engineering team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner.
We are looking for a Senior Validation Engineer with expertise in one or more of the following validation domains : functional, electrical, high speed interfaces, memory, power/performance, debug/BU and tool development. You will be part of the Post-Silicon Validation team in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon Org.
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.
Responsibilities
Responsibilities
Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools, and other verification collateral Execute content in post-silicon, triage, and debug failures Apply your growth mindset to learn and adapt in a complex and dynamic environment Engage with partners to drive continuous improvement to design, validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise Collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers Delight your customers by providing high quality results on schedule Provide technical leadership with respect and integrity Apply your expertise towards pre-silicon verification plans, tests, and debug of your area
Qualifications
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Other Requirements
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Requirements
Demonstrated success in running cross-disciplinary taskforces Verification, logic design or validation experience as part of a CPU, SoC and/or IP development team. Leadership skills Experience with high-speed IO (ethernet, PCIe) Understanding of board level schematics Understanding of system level software and firmware Demonstrated success in hardware/software debug efforts Expertise debugging silicon failures using on chip debug features (like trace or JTAG) as well as test equipment (like protocol analyzers, bit error rate testers, logic analyzers, high speed oscilloscopes)
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here
https: //careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.