
Post Silicon Validation Engineer(ATE- 93K/UFlex)
Tessolve • Bengaluru, Karnataka, India
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Role & seniority
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Silicon Validation Engineer / Senior Silicon Validation Engineer / Team Lead
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2–10 years semiconductor experience
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Stack/tools
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ATE/Test platforms: Teradyne, Advantest, NI, Cohu (or similar)
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ATE test programs: C/C++, Python, VB (per test procedure)
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ATE tool family examples: Uflex, UltraFlex, IFlex, UltraFlex+, V93K, ETS88, ETS364
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Interfaces: PCB design/DFT/chip design collaboration; probe cards, load boards
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Top 3 responsibilities
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Develop ATE test procedures/plans from device datasheet and define test methodologies.
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Build/lead test hardware design guidance (probe cards, final test load boards; schematics; placement/layout guidelines).
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Own silicon bring-up and characterization (debug, validate specs across temp/voltage/process corners) and drive program release to wafer final test / production.
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Must-have skills
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Hands-on ATE test engineering experience on industrial platforms (Teradyne/Advantest/NI/Cohu etc.)
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Ability to develop complete ATE software per documented test procedure (C/C++/Python/VB)
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Cross-functional debug with chip design and DFT teams during bring-up
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Strong test characterization/validation skills across temperature, voltage, and process corners
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Experience with test program release for final production quality (wafer final test)
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Nice-to-haves
- Exposure to post-silicon validation, **product
Full Description
Designation: Silicon validation Engineer/ Sr. Silicon validation Engineer/ Team Lead
Experience: 2-10 Years
Working Location: Bangalore/Chennai/Vishakapatnam
Who Can Apply
2–10 years of experience in the Semiconductor industry with exposure to Post Silicon Validation, Product Engineering, or ATE/Test Engineering activities Hands-on experience with ATE platforms such as Teradyne, Advantest, National Instruments (NI), Cohu, or similar semiconductor test platforms will be considered an added advantage
Job Description
Test Engineer must work with different teams for understanding the device datasheet and needs to come up with a detailed Test procedure/plan to test the chip. Need to interact with the PCB design team for developing the necessary hardware – Test load board, bench board, and probe cards.
He/she should develop the complete ATE test program to validate the chip. Close interactions with the chip design and DFT teams are a must during the device debug phase and bring up and need to validate all the device parameters with the specifications. In addition, Test engineer should involve in developing the test methodologies as required.
Responsibilities
Develop ATE test solution for semiconductor IC’s in different domains as Power management / Digital / Mixed signal or RF Be a primary contact to interact with customer / vendors (design / support teams) Work with design/DFT team to develop the detailed test procedure from device data sheet. Develop and lead the hardware design activity (Probe cards / Final test load boards), develop schematics, provide placement / layout guidelines to PCB design engineer Silicon bring up using ATE tool such as Teradyne, Advantest etc (Uflex, Ultra Flex, IFlex, UltraFlex +,V 93K,ETS 88,ETS 364. ATE software development as per test procedure document (C, C++, Python, VB etc) Device characterization across temperature, voltage and process corners, and validate the chip against the specification Responsible for releasing the Final production quality test program to the customer –both wafer final test program. Interact with the customer on a daily basis and provide status updates through e-mails and conference calls. Responsible from the beginning to the Final test program release to production