**Role & seniority: ** Hands-on Silicon Validation Engineer (seniority not explicitly stated)

**Stack/tools: **

Hardware/lab: oscilloscopes, BERTs, protocol analyzers, logic analyzers, pattern generators
FPGA/enablement: Quartus (FPGA validation enablement/debug)
Automation: scripting/programming for validation automation & data analysis
Interfaces/PHY: DDR, LPDDR, MIPI; transmitters/receivers; clocking; voltage regulators
Top 3 responsibilities:
1. Own end-to-end validation of high-speed I/O and PHY across multiple silicon programs (DDR/LPDDR/MIPI, clocking, regulators)
2. Build scalable validation frameworks and custom FPGA test content
3. Lead post-silicon bring-up, electrical characterization, and debug; drive cross-functional issue resolution (incl. firmware)
Must-have skills:
- Hands-on validation experience with high-speed analog interfaces/PHYs (DDR/LPDDR/MIPI)
- Strong knowledge of signal/power integrity, timing, analog/mixed-signal behavior
- Proficient use of electrical measurement tools (oscilloscopes, BERTs, protocol analyzers, etc.)
- Experience in post-silicon debug across silicon/package/board/firmware/software domains
- Ability to script/program for automation and data analysis
Nice-to-haves:
- Experience with influencing board high-speed channel design (stack-up/routing/I/O termination)
- Experience collaborating with firmware on **test

Full Description

We are seeking a hands-on Silicon Validation Engineer to lead the bring-up and validation of high-speed analog I/O and PHY designs, including transmitters, receivers, clocking circuits, and voltage regulators for DDR, LPDDR, and MIPI interfaces.
Key Responsibilities
Own end-to-end high-speed I/O and PHY validation across multiple silicon programs.
Develop scalable validation frameworks and custom FPGA test content.
Execute post-silicon bring-up, electrical characterization and debug, driving cross-functional issue resolution.
Influence board design on high-speed channel implementation, stack-up, routing, and I/O termination.
Collaborate with firmware teams to develop test algorithms and validate calibration flows.
Partner with circuit design teams to review circuit architectures and drive design improvements based on silicon results.

Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or a related discipline.
Hands‑on expertise with validating high‑speed interfaces and PHYs such as DDR, LPDDR and MIPI.
Strong understanding of high‑speed signal integrity, power integrity, timing, analog/mixed‑signal behaviors and electrical measurement methodologies.
Proficiency with lab equipment, including oscilloscopes, BERTs, protocol analyzers, logic analyzers, and pattern generators.
Experience in post-silicon debug and issue resolution across silicon, package, board, firmware, and software domains.
Proficiency in scripting or programming for validation automation and data analysis, with experience using Quartus for FPGA validation enablement and debug.

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.