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Staff Mixed-Signal Verification – Analog IP

onsemi Allen, Texas, United States

onsitefull-time
Posted Sep 1, 2026

**Role & seniority: ** Staff Mixed-Signal Verification Engineer (mid-level individual contributor reporting to Analog Design Team Manager)

**Stack/tools: **

  • SystemVerilog

  • Behavioral modeling

  • Mixed-signal/analog verification in digital-on-top SoC environments (Treo platform)

  • Top 3 responsibilities:

    • Develop and execute mixed-signal verification solutions for analog/mixed-signal IP integrated into digital-on-top SoCs

    • Create behavioral models and verification logic to ensure IP meets functional/integration requirements

    • Verify power and clock IP behavior prior to tape-out

  • Must-have skills:

    • Strong mixed-signal/analog verification experience

    • Proficiency in SystemVerilog

    • Ability to build verification using behavioral modeling for integration-level requirements

  • Nice-to-haves:

    • Experience verifying power/clock blocks specifically

    • Familiarity with high-voltage analog/mixed-signal SoC environments (e.g., BCD technologies / Treo-like platforms)

  • Location & work type:

    • Location: East Fishkill, New York (referenced as onsemi’s 300mm fab site)

    • Work type: Not explicitly stated in the text (assumed on-site/hybrid unknown)

Full Description

onsemi (Nasdaq: ON) is a global leader in intelligent power and sensing technologies, driving innovation to build a safer, cleaner, and smarter world. With a strong focus on automotive, industrial, and AI data center markets, we are shaping the future of vehicle electrification, sustainable energy, and advanced automation.

About the Treo Platform

The Treo Platform is a high‑performance analog and mixed‑signal platform built on 65nm Bipolar‑CMOS‑DMOS (BCD) technology. Supporting voltages from 1–90V and operating temperatures up to 175°C, Treo enables scalable SoC solutions for automotive, medical, industrial, and AI data‑center applications. Its modular analog IP is integrated into digital‑on‑top architectures manufactured in onsemi’s 300mm East Fishkill, NY fab.

About the Role

We are seeking a Staff Mixed‑Signal Verification Engineer to verify analog and mixed‑signal IP integrated into digital‑on‑top SoC environments on the Treo platform. This mid‑level individual contributor role reports directly to the Analog Design Team Manager. You will own the development and execution of mixed‑signal verification solutions, leveraging SystemVerilog and behavioral modeling to ensure power and clock IP meet functional and integration requirements prior to tape‑out.

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here

https: //www.onsemi.com/careers/career-benefits

[https: //www.onsemi.com/careers/career-benefits]

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

onsemi is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, ethnicity, color, religion, ancestry, national origin, age, marital status, pregnancy, sex, sexual orientation, physical or mental disability, medical condition, genetic information, military or veteran status, gender identity, gender expression, or any other protected category under applicable federal, state, or local laws.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact Talent.acquisition@onsemi.com [Talent.acquisition@onsemi.com] for assistance.

Mixed-signal verificationSystemVerilogUVMBehavioral modelingVerilog-AAMSSoC simulationAnalog IPDigital-on-top architecturesPower managementClocking architecturesCoverage-driven verificationAssertion-based methodologiesSilicon reliabilityScriptingMentoringmulti-location

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