Silicon Validation & Bring up Engineer
Lyte • Sunnyvale, California, United States
Salary: $150,000 - $260,000 / year
**Role & seniority: ** Hands-on Validation Engineer; mid–senior (5+ years)
**Location & work type: ** Sunnyvale, California (Bay Area); onsite/hands-on validation work implied
**Stack/tools: ** Python (test automation/data analysis); lab instrumentation (oscilloscopes, logic analyzers, spectrum analyzer, protocol analyzers); high-speed interface validation; ASIC/SoC blocks knowledge (DMA, cache, DDR, SRAM, IPC, timers/PTP, OTP). Digital comms: SPI, I2C, UART, Ethernet, CAN, SWD, JTAG.
**Top 3 responsibilities: **
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Lead silicon bring-up for new tape-outs (from first power-on through functional validation)
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Develop/execute test plans for functional + performance validation; characterize vs product specs
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Debug and root-cause mixed-signal device issues (design vs process vs board-level) and automate high-throughput tests
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Must-have skills:
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Chip/system bring-up & validation experience
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Python proficiency for automated characterization
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High-speed serial interface validation experience
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Strong analog/mixed-signal fundamentals (SI/transmission lines/feedback; compliance testing; time/frequency measurements)
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Ability to read schematics/layout/datasheets
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Mixed-signal knowledge: bias networks, LDOs, PLLs, ADCs/DACs
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Experience with digital protocols (SPI/I2C/UART/Ethernet/CAN/SWD/JTAG)
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Nice-to-haves:
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MS/PhD
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PVT corner characterization and
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Full Description
About Lyte
Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit www.lyte.ai
If you’re excited about building impactful technology in a dynamic, hands-on environment, we’d love to hear from you!
About The Role
We are seeking a hands-on Validation Engineer to take our custom silicon devices from first power-on to production readiness. The role involves close collaboration across analog design, logic design, and package design teams.
What You'll Do
Lead silicon bring up for new tape-outs from initial power-on through functional validation Develop and execute structured test plans covering functional and performance validation Characterize analog and digital circuit behavior against product specifications Build automated test infrastructure using Python for high-throughput characterization Debug complex mixed-signal devices using oscilloscopes, logic analyzers, spectrum analyzers, and protocol analyzers Validate high-speed interfaces including signal integrity analysis Root-cause issues and distinguish design vs. process vs. board-level failures
Required Qualifications
BS in Electrical Engineering, Computer Science, or a related field with 5+ years of relevant experience Hands-on chip or system bringup and validation experience Proficiency in Python for test automation and data analysis Experience validating high-speed serial interfaces
Understanding of analog fundamentals: signal integrity, transmission lines, feedback theory, and voltage/current source compliance testing Knowledge of frequency-domain and time-domain measurements
Solid analog circuit knowledge: bias networks, LDOs, PLLs, ADCs/DACs, and mixed-signal interfaces Ability to read and interpret schematics, layout files, and datasheet specifications
SOC Circuitry: DMA, Cache, DDR, SRAM, IPC, Timers / PTP, OTP
Hands on experience with Digital comms: SPI, I2C, UART, Ethernet, CAN, SWD, JTAG
Preferred Qualifications
MS or PhD in Electrical Engineering, Computer Science, or a related technical field PVT corner characterization and yield analysis experience Prior ASIC tape-out experience from prototype to production
Reliability testing exposure: HTOL, ELFR, ESD/latch-up
Benefits (subject to location and local regulations)
Competitive salary and equity Comprehensive medical, dental, and vision coverage 401(k) retirement plan Flexible vacation and time-off policy Collaborative, fast-paced, and inclusive work environment Opportunity to work on cutting-edge technologies with a highly cross-functional team
The Pay Range For This Role Is
150,000 - 260,000 USD per year(Bay Area, CA)
