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AMS Design Verification Lead – Mixed-Signal SoC | GaN

Texas Instruments • Bengaluru, Karnataka, India

onsitefull-time
Posted Sep 26, 2026Apply by Oct 26, 2026

**Role & seniority: ** AMS Design Verification Engineer / Lead (mixed-signal DV), ~3–8 years; leadership/mentoring expected

**Stack/tools: ** SystemVerilog, UVM, VerilogAMS (wreal, electrical), SV RNM; Cadence tools (Virtuoso, ADE Assembler, Xcelium, VIVA, SimVision); Cadence Spectre; automation (Python/Perl/TCL/shell)

**Top 3 responsibilities: **

  • Define coverage-driven mixed-signal verification plan and partner with System/Design teams

  • Build AMS verification infrastructure: behavioral models, SV/UVM-based testbenches/tests/checkers/assertions/monitors

  • Develop system-level AMS tests and own post-silicon/debug collaboration with Test/Validation/customer teams

  • Must-have skills:

    • Strong mixed-signal verification fundamentals (analog building blocks, integration, SoC-level DV concepts)

    • Experience creating mixed-signal testbenches in SV/UVM from scratch

    • Simulation/debug expertise (waveform/schematic/model debugging) and coverage analysis

    • Ownership of deliverables/schedules; strong communication and team collaboration

  • Nice-to-haves:

    • SoC-AMS testbench development experience

    • Cadence mixed-signal flow proficiency (Spectre regression/debug, environment/tools)

    • Expertise in top-level mixed-signal waveform review, checkers/assertions

    • Automation skills (Python/Perl/TCL/shell)

    • Analog controller knowledge for system-level TB; prior AMS DV Lead experience

  • Location & work type: Bangalore, India; onsite (startup-like team-b

Full Description

⚡ Build Something Extraordinary — Lead AMS Verification for World-Class High Voltage Power ICs

At Texas Instruments, our High Voltage Power (HVP) team develops some of the world's most advanced power solutions — AC/DC controllers, isolated DC/DC converters, GaN-integrated power stages, and modules capable of withstanding several hundreds of volts. Now, we're building this capability in Bangalore — and we're looking for an exceptional AMS DV Engineer/Lead to be part of this exciting journey from the ground up.

🔎 About the Opportunity

This is a rare startup-like opportunity within the safety of TI's global umbrella. You won't just join a team — you'll help build one. As part of TI's new HVP investment in India, you'll work in a dynamic, entrepreneurial environment while having access to TI's world-class tools, processes, and expertise. We are looking for a talented AMS Design Verification Engineer/Lead to join the HVP team in Bangalore — responsible for developing and driving mixed-signal verification strategy, AMS testbenches, behavioral models, and SoC-level DV for high-voltage power controller ICs.

📌 Key Responsibilities

Develop detailed coverage-driven verification plans in close collaboration with System and Design teams Perform behavioral modeling of analog blocks using SV RNM, VerilogAMS (wreal, electrical) Identify and develop system-level AMS tests to ensure bug-free silicon Independently develop SV/UVM-based testbenches, tests, checkers, assertions, and enhance with randomization and coverage Innovate and drive new and improved design verification methodologies; collaborate with EDA teams to upgrade tools and flows Interact with Test/Validation teams in post-silicon activities and customer debug/analysis Mentor and lead junior DV engineers — drive smart team initiatives and knowledge sharing Collaborate closely with the DMS/SoC DV team for RTL verification support as needed Maintain strong interactions with Digital Design, Firmware, Analog Design, and Applications teams

🛠️ Minimum Requirements

Bachelor's/Master's degree in Electrical/Electronics Engineering 3–8 years of experience in mixed-signal design verification Strong fundamentals in mixed-signal designs — analog building blocks, digital design processes, top-level integration Proven experience in developing mixed-signal testbenches in SV/UVM from scratch Strong simulation debug capability — waveform analysis, schematic simulation debug, model debugging Ability to own design deliverables and schedules independently Strong communication, interpersonal, and team collaboration skills

🌟 Preferred Qualifications

Hands-on expertise in SoC-AMS testbench development Proficiency with Cadence Mixed-Signal Design Environment — Virtuoso, ADE Assembler, Xcelium, VIVA, SimVision Expertise in Cadence Spectre simulation testbench development, regression flow, and debug Expertise in mixed-signal waveform review, debugging, and coverage analysis Strong HDL skills — SystemVerilog, UVM, VerilogAMS Experience in writing checkers, assertions, and monitors for top-level simulations Expertise in automation using Python, Perl, TCL, or shell scripting Knowledge of analog controllers for system testbench development and debug Prior experience as an AMS DV Lead for a project is a strong advantage

💡 Why Texas Instruments HVP Bangalore?

🚀 Startup Energy: Join a new team being built from scratch — your contributions shape the culture and capability

🏆 Global Impact: Work on the world's largest HVP portfolio — AC/DC, DC/DC, GaN, and modules

🤝 Leadership: Lead, mentor, and grow junior DV engineers in a high-ownership environment

💰 Compensation: Competitive salary, comprehensive benefits & long-term incentives

📚 Innovation: Access to cutting-edge EDA tools, TI's global DV methodology, and Cadence mixed-signal flows

🔬 Technology: Work on GaN, high-voltage, and isolated power controller SoCs — one of the most demanding domains in semiconductors

📣 Ready to Lead AMS DV at TI's Newest HVP Team in Bangalore?

If you are passionate about mixed-signal verification, AMS testbench development, and the rare opportunity to build a team and technical capability from the ground up — we want to hear from you.

👉 Apply now

Mixed-Signal Design VerificationSystemVerilogUVMVerilogAMSReal-Number ModelingAMS Testbench DevelopmentBehavioral ModelingCoverage-Driven VerificationAssertions and CheckersSoC-Level VerificationCadence VirtuosoCadence XceliumCadence SpectreWaveform AnalysisPythonTeam Leadership and Mentoringmulti-location

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