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System Validation Engineer

Oppstar Berhad • Penang, Malaysia

onsitefull-time
Posted Sep 30, 2026Apply by Oct 30, 2026
  • Role & seniority

    • Platform Memory Sub-system Validation Engineer (CPU/APU/GPU)

    • Senior level: ~3–5 years experience (mid-level)

  • Stack/tools

    • Memory interfaces: DDR / LPDDR / GDDR

    • Debug/testing environments: Windows & Linux

    • Debug tools: Win-debug, logic analyzers, protocol analyzers

    • Scripting: Python, Ruby, Perl

  • Top 3 responsibilities

    • Develop and execute platform-level electrical & functional test plans for memory subsystems (DDR/LPDDR/GDDR).

    • Debug I/O interfaces (DDR) and use hardware/software tools to isolate issues.

    • Identify, debug, and resolve system-level issues, coordinating with memory, debug, design, firmware, and software teams; maintain validation plans/reports.

  • Must-have skills

    • Hands-on experience in system/post-silicon validation focused on I/O/memory subsystems

    • Strong understanding of DDR/GDDR and their hardware/software interaction

    • Proven ability to debug using tools (logic/protocol analyzers, Win-debug)

    • Ability to work in Windows/Linux; strong communication and organization for cross-functional collaboration

  • Nice-to-haves

    • Advanced use of protocol-level analysis for memory/I/O bring-up

    • Broader scripting automation beyond baseline proficiency (Python/Ruby/Perl)

  • Location & work type

    • Location: not specified

    • Work type: may be regular or fixed-term contract

Full Description

This job will be on platform memory sub-system validation of CPUs, APUs and GPUs. This role is critical to ensure the reliability and performance of the products throughout their lifecycle.

KEY RESPONSIBILITIES

  • Experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans, preferably DDR/LPDDR/GDDR Memory test experience.
  • Extensive hands-on experience and demonstrated technical expertise in the debug of I/O interfaces such as DDR.
  • Identify, debug, and resolve system-level issues, collaborating with cross-site memory, debug, design, firmware, and software teams.
  • Maintain detailed validation plans and reports

EXPERIENCE

  • 3-5 years of industry experience in system or post-silicon validation of IO system.
  • Familiar with Windows and Linux environment.
  • Strong understanding of DDR/GDDR memory sub-system and their interaction with hardware and software.
  • Hands-on experience with debugging tools such as Win-debug, logic analyzers, and protocol analyzers.
  • Familiar with Python, Ruby, Perl language.
  • Strong communication and organizational skills to manage cross-functional collaboration effectively.

*This position may be offered as regular OR fixed-term contract based.

Platform ValidationElectrical TestingFunctional TestingDDR MemoryLPDDR MemoryGDDR MemoryI/O Interface DebuggingSystem-Level DebuggingWindowsLinuxWinDbgLogic AnalyzersProtocol AnalyzersPythonRubyPerl

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