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Staff Digital Verification Engineer

onsemi • Bengaluru, Karnataka, India

onsitefull-time
Posted Oct 13, 2026

**Role & seniority: ** Staff Digital Verification Engineer (6–10 years ASIC/SoC verification); expected to lead/own verification across IP → subsystem → SoC.

**Stack/tools: **

  • Languages: SystemVerilog (mandatory), UVM

  • Verification: coverage-driven verification, constrained-random/directed/scenario tests, scoreboards/monitors/protocol checkers, SVA/assertions

  • Simulation: Gate-Level Simulation (GLS) required

  • Industry simulators: Xcelium, Questa

  • Reference models: C/C++ golden model development/debug

  • AI-assisted tools: GitHub Copilot / Microsoft Copilot / LLM-based code gen/debug / AI verification productivity tools

  • Protocols (examples): I2C, AHB/APB, MIPI

  • Top 3 responsibilities:

    1. Architect and build reusable, scalable UVM/SystemVerilog verification environments; lead independent verification efforts.

    2. Develop and implement verification components: tests, scoreboards, monitors/protocol checkers, assertions, coverage models.

    3. Debug complex RTL/gate-level failures for functional/timing signoff; run and debug fault injection simulations and improve golden models.

  • Must-have skills:

    • SystemVerilog (mandatory) + UVM (mandatory)

    • Coverage-driven verification and scalable environment development

    • Debugging RTL and gate-level simulation issues (including GLS exposure)

    • Constrained-random/directed/scenario test development

  • Nice-to-haves:

    • Fault injection simulation experience (functional

Full Description

Position Summary

We are looking for a highly motivated Staff Digital Verification Engineer with 6-10 years of experience in ASIC/SoC verification. The ideal candidate will have strong expertise in System Verilog (SV) and UVM, along with hands-on experience in developing scalable verification environments, coverage-driven verification, and debugging complex RTL and gate-level issues. Exposure to Gate-Level Simulation (GLS) is required, while experience with fault injection simulations will be considered a strong advantage.

#LI-DJ1

RESPONSIBILITIES

Key Responsibilities

  • Expected to take ownership and lead verification efforts across IP, subsystem, and SoC-level projects and work independently.
  • Independently Architect and develop reusable verification environments using System Verilog and UVM.
  • Create constrained-random, directed, and scenario-based test cases.
  • Develop scoreboards, monitors, protocol checkers, assertions (SVA), and coverage models.
  • Analyze and debug RTL and gate-level simulation failures for timing and functional signoff.
  • Analyze, debug, and enhance C/C++ golden reference models for functional verification.
  • Execute, and debug fault injection simulations to validate functional safety requirements and fault handling mechanisms.
  • Collaborate closely with design, DFT, physical design, and architecture teams to resolve issues and support sign-off activities.

Work with AI-assisted engineering tools (e.g., GitHub Copilot, Microsoft Copilot, LLM-based code generation/debug tools, AI-driven verification productivity solutions) to enhance regression infrastructure and verification automation

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QUALIFICATIONS

  • Master's degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.
  • 6-10 years of hands-on experience in Digital/ASIC/SoC Verification.

*** Strong expertise in:** System Verilog (Mandatory) and UVM (Mandatory)

  • Familiarity with industry-standard simulators such as Xcelium and Questa.
  • Verification experience with some or all protocols such I2C, AHB/APB, MIPI

#LI-DJ1

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here

https: //www.onsemi.com/careers/career-benefits

[https: //www.onsemi.com/careers/career-benefits]

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

System VerilogUVMASIC VerificationSoC VerificationRTL DebuggingGate-Level SimulationFault InjectionConstrained-random testingCoverage-driven verificationScoreboardsProtocol checkersSVAC++XceliumQuestaI2Cmulti-location

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