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Validation Engineer

ACL Digital • Bengaluru, Karnataka, India

onsitefull-time
Posted Oct 14, 2026Apply by Nov 13, 2026

**Role & seniority: ** High-Speed IO IP System Test Engineer (6+ years), post-silicon electrical characterization/validation

**Location & work type: ** Bangalore, on-site/physical lab-based work (implied)

**Stack/tools (test & analysis): **

  • High-end lab instruments: Oscilloscopes, BERTs, VNAs

  • SI channel analysis/simulation (specific tools not listed)

  • Python automation for test flows

  • Protocol test coverage for: PCIe Gen4/5/6, USB4, MIPI MPHY, UFS, HDMI, DisplayPort

**Top 3 responsibilities: **

  • Define and execute electrical test plans and compliance/logo testing for multiple high-speed IO protocols

  • Validate across PVT conditions and support first-silicon readiness

  • Lead root-cause analysis (RCA) in collaboration with SoC design, firmware, and board design teams

**Must-have skills: **

  • Deep expertise in post-silicon electrical characterization/validation of high-speed IOs

  • Hands-on proficiency with oscilloscope/BERT/VNA workflows

  • Strong test architecture skills using SI analysis/simulation and Python automation

  • Ability to perform RCA and drive issues to closure with cross-functional teams

**Nice-to-haves: **

  • Experience specific to protocols listed (PCIe/USB4/MIPI-UFS/HDMI/DisplayPort) beyond basic coverage

  • Demonstrated experience in customer-facing technical engagements (implied from description)

Full Description

High-Speed IO IP System Test Engineer

Experience: 6 years

Location: Bangalore.

Are you an expert in post-silicon electrical characterization and validation of cutting-edge High-Speed IOs?

ACL Digital is looking for a High-Speed IO IP System Test Engineer to join our team in Bangalore (Experience: 6+ Years). In this role, you will define and execute comprehensive electrical test plans and compliance/logo testing for protocols like PCIe Gen 4/5/6, USB4, MIPI MPHY UFS, HDMI, and DisplayPort across PVT conditions. You’ll collaborate closely with SOC design, firmware, and board design teams to lead root-cause analysis (RCA) and ensure seamless first-silicon readiness. Candidates with hands-on experience using high-end lab gear (Oscilloscopes, BERTs, VNAs), SI channel analysis/simulations, and Python automation will stand out. If you thrive in customer-facing technical roles and love driving test architecture innovation, we want to hear from you! 📩 Interested candidates can share their updated CV directly to janagaradha.n@acldigital.com.

Post-Silicon ValidationElectrical CharacterizationHigh-Speed I/OPCIeUSB4MIPI M-PHYUFSHDMIDisplayPortCompliance TestingOscilloscopesBERTsVNAsSignal Integrity AnalysisPython AutomationRoot-Cause Analysismulti-location

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