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ProTalent Recruiters • Haifa, Haifa District, Israel
Role & seniority: Senior VLSI Verification Engineer
SystemVerilog, UVM
Reusable verification components and utilities
Git, Python (advantage), code templating, open-source verification workflows
Firmware verification, emulation-based verification on FPGA
Optional: formal verification, mixed-signal simulation
Develop and maintain advanced verification environments (SystemVerilog/UVM) scalable across IPs
Build and run comprehensive testbenches and random test suites; validate functional correctness and corner cases in SoC contexts
Drive coverage closure, analyze metrics, identify gaps, and ensure complete validation prior to sign-off; lead debug and root-cause analysis
B.Sc. in Electrical/Computer Engineering or equivalent
5+ years in VLSI verification
Expertise in SystemVerilog and UVM
Strong software development skills; ability to create reusable verification components
Excellent organizational, planning, and communication skills; detail-oriented problem-solving
Experience with Git, Python, templating methods, and open-source verification workflows
Full-chip level VLSI verification (reset architectures, power domains/modes)
Firmware verification including FPGA-based emulation
Formal verification or mixed-signal simulation
Location & work type: Not specified in the provided text; multinational company with international coll
Chips Talk, We Listen proteanTecs is a game-changing startup that's giving advanced electronics the power to report on their own health. In a digital world built for autonomous driving, cloud computing, and AI, we depend on computing systems daily. But how can we guarantee their safety, reliability and functionality? proteanTecs is the first-ever company to provide visibility into next-gen chips while they are operating, based on the power of on-chip monitoring, machine learning, and data analytics. Here at proteanTecs, you'll be part of a team that's unlocking deep insights to make electronics more reliable, efficient, and high-quality. We're trusted by industry leaders in data centers, automotive, communications, and consumer devices – we work with the world's largest and most notable companies in tech.
Fast-paced and impactful: We're a mission-driven startup, so you'll tackle new challenges daily, wear many hats, and see your work directly influence the future of electronics.
Supportive company culture: Learn from the best. Our 200+ team members are experts in their field with a proven track record of success, and they're committed to fostering a collaborative and supportive work environment.
International presence: We're a multinational company with a diverse team across multiple locations around the globe. You'll collaborate on projects with international impact, gaining a global perspective of the tech industry.
Work with industry leaders: Our solutions are used by the biggest names in tech. You'll be part of the team creating the next generation of groundbreaking products.
Cutting-edge playground: We use the latest machine learning, platforms, and tools to push boundaries and achieve breakthroughs.
Real-world impact: Our work keeps data centers, cars, and other critical systems running smoothly. Your work will directly contribute to safer, more reliable electronics.
We are here for the win: Backed by industry veterans and leading investors, we offer a stable and secure work environment with plenty of room for growth. proteanTecs is looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Requirements
B. Sc. in Electrical/Computer Engineering or equivalent.
Responsibilities Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs. Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments. Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off. Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues. Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level. Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.
Personal skills null