Role & seniority: SoC Display Subsystem Validation Engineering Program Manager (EPM); senior engineering program manager / technical lead role focused on validation and integration

Stack/tools: SoC display IP/driver IC development, validation and debugging; silicon/software/system integration; OS-level validation; cross-functional debugging; executive reporting and metrics-driven project management

Top 3 responsibilities

Lead strategic planning and end-to-end validation of the SoC display subsystem (display pipeline, driver IC, FW/SW at system level)
Assemble architecture-guided feature enablement with de-risk and validation plans for both SoC and system levels; tune for display image quality
Drive cross-functional debugs and risk mitigation to minimize late SoC revisions and enable pioneering display technologies across Apple product lines

Must-have skills

BS in engineering and 10+ years of relevant experience
Proven experience in SoC display IP/driver IC development, validation, or debug (silicon/software/system integration)
Technical Program Management or engineering leadership experience

Nice-to-haves

SoC display pipe architecture / digital signal processing knowledge
Exposure to multiple display technologies; exceptional debugging skills
Ability to summarize complex details for executives; strong metrics-driven project ownership; leadership in dynamic, multi-disciplinary environments
Location & work type: Location not sp

Full Description

Do you want to apply your engineering background to make big things happen? Can you influence, connect, get results, and communicate effectively? Come to Apple and work within a dynamic team to deliver innovative technologies to our customers. This is an excellent opportunity to engage in groundbreaking display technologies and add to the development of new Apple SoCs and products year after year.

DESCRIPTION

SoC Display Subsystem Validation Engineering Program Manager (EPM) is a system integration role within the Hardware Technologies Team, that will lead the strategic planning and execution of end to end validation of the SoCs display

subsystem. The subsystem is comprised of: display pixel pipeline in the SoC, the display module and driver IC, as well as the FW/SW to enable the display features at the system level. This EPM will be responsible for pulling together an architecture guided highly multi-functional feature enablement, de-risk, and validation plan at both SoC and System level (running OS), and tuning to optimize display image quality. The EPM will also drive cross-functional debugs, and critical de-risk plans to minimize risk of late SoC revisions in enabling pioneering display technologies across all Apple product lines.

MINIMUM QUALIFICATIONS

BS in engineering field and 10+ years of relevant experience. Proven experience in SoC Display IP/Driver IC development, validation or debug - Silicon / Software / System integration (one or all three) experiences will be considered. Technical Program Management or Engineering Leadership/Management experience.

PREFERRED QUALIFICATIONS

SoC display pipe architecture / digital signal processing. Exposure to different display technologies. Excellent debugging skills. Proven track record to drive resolution of critical problems, while under pressure. Ability to filter and distill relevant information for the right audience. Passionate to own/drive project development using well-defined metrics. Thrives in dynamic schedule driven development environment. Ability to succinctly summarize complex details for executive reporting. Extraordinary leadership skills and ability to encourage team members with a commitment to see the bigger picture. Experience working in a dynamic multi-disciplined engineering environment, strong at multi-tasking.