Cookies & analytics consent
We serve candidates globally, so we only activate Google Tag Manager and other analytics after you opt in. This keeps us aligned with GDPR/UK DPA, ePrivacy, LGPD, and similar rules. Essential features still run without analytics cookies.
Read how we use data in our Privacy Policy and Terms of Service.
🤖 15+ AI Agents working for you. Find jobs, score and update resumes, cover letter, interview questions, missing keywords, and lots more.
NXP Semiconductors • Catania, Sicily, Italy
Role & seniority
Stack/tools
DFT methodologies: Scan, MBIST, LBIST, boundary scan, JTAG
ATPG tools (industry standard)
UPF/CPF-based low-power DFT
Fault models: stuck-at, transition, path delay
DFT for high-speed interfaces and mixed-signal blocks
RTL and gate-level verification; collaboration with RTL, PD, ATE teams
Silicon bring-up and ATE test program development
Top 3 responsibilities
Define and implement DFT architecture for complex SoCs (scan, MBIST, LBIST, boundary scan)
Develop/integrate scan insertion, test compression, ATPG patterns; implement memory and logic BIST strategies
Collaborate with RTL and physical design for DFT insertion and timing closure; perform RTL/gate-level DFT verification and support silicon bring-up and ATE
Must-have skills
Master’s degree in Electrical/Electronics Engineering
Strong expertise in DFT (Scan, MBIST, LBIST, JTAG)
Hands-on experience with ATPG tools; UPF/CPF-based low-power DFT
Knowledge of fault models; familiarity with physical-design constraints for DFT
Experience in silicon debugging and ATE bring-up; SoC-level DFT
Nice-to-haves
Exposure to high-speed interfaces and DFT for mixed-signal blocks
Experience across Design, Architecture, Verification, DfT, and Physical Design
Strong problem-solving and communication skills
Location & work type
Catania, Italy
On-site/full-time (local product development)
NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace. This team will include all key engineering disciplines in Design, Architecture, Verification, DfT and Physical Design to produce high performance and quality products. We are now hiring for an SoC DfT Engineer: SoC DfT Engineer is responsible for designing, implementing, and verifying DFT architectures for complex SoCs. You will work closely with RTL, physical design, and verification teams to ensure robust testability and high-quality silicon. Role will also include working closely with Test Engineers to realize cost-effective and high-quality products. Job Responsibility: Define and implement DFT architecture for SoCs (scan, MBIST, LBIST, boundary scan). Develop and integrate scan insertion, test compression, and ATPG patterns. Implement memory BIST and logic BIST strategies. Collaborate with RTL and physical design teams for DFT insertion and timing closure. Perform DFT verification at RTL and gate-level simulations. Work with ATE teams for test program development and silicon bring-up. Optimize test coverage, pattern count, and test time. Your Profile: Master’s degree in Electical/Electronics Engineering. Strong expertise in DFT methodologies: Scan, MBIST, LBIST, JTAG. Hands-on experience with industry standard ATPG tools. Proficiency in UPF/CPF-based low-power DFT. Knowledge of fault models (stuck-at, transition, path delay). Familiarity with physical design constraints for DFT. Experience in silicon debug and ATE bring-up. Past experience with SoC level DFT. Exposure to high-speed interfaces and DFT for mixed-signal blocks. Strong problem-solving and communication skills. Commitment At NXP. We recognize we can be a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. More information about NXP in Italy... #LI-b8d9 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Thank you for considering a career at NXP. To help you prepare for the different steps in our hiring process, see the following useful advice and tips. Are you already an NXP employee? Do not apply here. Instead, you must apply via our internal career page. Thank you for your interest in supporting our recruitment efforts. Please note that NXP operates under a strict Preferred Supplier List (PSL) for all recruitment activities. Any candidate profiles or resume submitted without a prior written agreement or explicit request from our Talent Acquisition team will be considered unsolicited. Such submissions will be deemed free of any obligations, and no fees will be paid by NXP or any of its affiliates, subsidiaries, or divisions - regardless of whether the candidate is hired, either coincidentally or otherwise. Thank you for your understanding.