Full Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

We are looking for an adaptive, self-motivated Design Engineer to work on IP (Intellectual Property) Release and Verification processes. As a key contributor in Infinity (Data) Fabric IP, you will be the critical link between the core IP development team and the various System-on-Chip (SoC) product integration teams. You will assist in preparing IP releases, validating deliverables and ensure that the IP milestone drops are high-quality, fully documented, and meet critical SoC project schedule. You will also be providing first-level support for integration issues, debug and analysis for failures.

THE PERSON

You are a detail-oriented engineer with a passion for modern, complex processor architecture, digital design, and/or verification in general. You have strong analytical and problem-solving skills and comfortable using industry-standard tools to ensure smooth IP integration. You are a team player who has excellent communication skills and enjoys collaborating with other engineers from different sites/time zones in a fast-paced environment.

Key Responsibilities

Collaborate with architects, IP designers, verification, physical design, and program management teams to understand new features, ensure smooth integration and timely deliver Build test plan documentation, accounting for interactions with other hardware/software features/components Write and implement both directed and random verification tests

IP Release support: milestone drop delivery to SoC team. Ensure deliverables are complete, accurate, and meet project timelines

Integration issue triage: provide first level of support for integration-related issues, helping to identify whether problems originate from IP, flow, or environment

Debug & Analysis: Use simulation and debug tools (e.g., VCS, Verdi) to analyze failures and support root cause identification Work with RTL and firmware engineers to resolve design defects Maintain and update IP documentation, including release details, integration guidelines, feature lists and known issues Ensure changelist integration Support automation efforts using scripting languages (Python, Perl) to improve release and validation flows.

Prefered Experience

Good understanding of computer architecture, interconnects and cache coherency Experience with digital design and verification methodologies, such as UVM Ability to analyze simulation results and assist in resolving complex technical issues Familiarity with simulation, emulation, and debug tools (e.g., VCS, Verdi) Object‑oriented programming experience (C++ and SystemVerilog) Scripting skills in Python, Perl, Shell, or Ruby Experience working in a Unix/Linux environment.

NICE TO HAVE

Direct experience with Verilog simulators (ModelSim, VCS, Eda Playground, etc.) Exposure to scripting and automation tools to streamline and enhance modeling workflows Familiarity with formal verification concepts and tools is a plus.

PERSONAL COMPETENCIES

Analytical mindset; goal‑oriented and eager to learn Self‑driven while able to work effectively within a team High sense of ownership and personal accountability Excellent communication and collaboration skills in a global, cross‑functional environment.

ACADEMIC CREDENCIALS

Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or a related discipline.

LOCATION

Iași (Hybrid)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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