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Marvell Technology • Ho Chi Minh City, Vietnam
Role & seniority: DFT Design Lead (Senior/Lead level) with 15+ years in DFT; 5+ years in DFT lead/architecture planning.
Stack/tools: Design for Test (DFT) engineering; latest Tessent (Siemens) features for Scan/Compression/ATPG with SSN, Memory BIST/Repair, DC/AC BSCAN; DFT automation; cross-functional handoffs (DFT2FE, DFT2PD, DFT2TE).
Lead DFT design efforts for custom ASICs in the Data Center, coordinating with local Vietnam and global teams.
Serve as technical advisor on DFT solutions and drive methodology improvements to meet new DFT requirements.
Lead and coordinate cross-functional project execution with other leads (DFT2FE, DFT2PD, DFT2TE) and support silicon bring-up post-tape-out.
Bachelor’s or Master’s in Electrical/Computer Engineering or related field.
15+ years in DFT engineering; 5+ years in DFT lead/architecture planning.
Proven mentoring/leadership on complex ASIC DFT projects; strong experience from design to silicon bring-up; proficiency with Tessent and DFT design automation; ability to support cross-functional DFT workflows; advanced professional English.
Experience with data-center/AIS/enterprise/CPU-like ASICs; familiarity with DFT2FE/DFT2PD/DFT2TE interfaces; track record of driving DFT methodology improvements and adoption of new EDA features.
Location & work type: Vietnam-based role with collaboration across local and global teams; full-time position.
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact At Marvell, as part of DCE-CCS-Hardware DFT group, we take all responsibility for Test Solutions from Architecture, Implementation, Verification before Tape Out and validation post Tape Out to enable Marvell products to reach Mass Production Readiness. What You Can Expect Take and play DFT Design Lead role with local team in Vietnam and global teams on custom ASIC for Data Center Help as key technical advisor to VN project teams on DFT solutions Involve in DFT methodology improvements and new initiatives to meet new DFT requirements with latest EDA supported features (Siemens Tessent) Lead & coordinate with other cross functional Leads on project execution. What We're Looking For Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field 15+ years of experience in Design for Test (DFT) engineering and 5+ years of experience in DFT Lead role / Architecture planning Strong experience in mentoring / leading team members on complex ASIC DFT projects. Strong experience in DFT from design to silicon bringing up with latest Tessent features (Scan/Compression/ATPG with SSN, Memory BIST/Repair, DC/AC BSCAN) and ability to support DFT design automation Strong experience in cross functional executions (DFT2FE, DFT2PD, DFT2TE) Advance English level for professional communication. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-UN1 Join our talent community to hear about company news, job openings and events. Join our Talent Community! Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Recruitment fraud is a well-known way that third parties try to get personal information or to steal money from you. Please review Marvell’s guidance here to learn more on how you can protect yourself.