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Jobs via Dice • San Jose, California, United States
Role & seniority: Analog/Mixed-Signal Verification Engineer, Senior/Staff level with 15–20 years of experience
Stack/tools: SystemVerilog, Verilog; SPICE simulations; RC extraction; SRAM/Cell architecture knowledge; Python/Perl scripting; analog IPs (ADC/DAC/LDO/charge pump); simulation, coverage, waveform analysis; testbench development; automation
Develop and implement mixed-signal verification strategies and coverage plans for complex ICs
Design/build verification testbenches, write and execute test cases to validate functionality, performance, and reliability
Review, simulate, and validate analog designs; sign off blocks and support tapeout readiness; collaborate across design, layout, and digital verification
Bachelor's degree in electrical engineering
15–20 years relevant experience; sub-40nm process and memory architecture preferred
Strong analog/mixed-signal design and verification fundamentals
Proficiency in SystemVerilog/Verilog; Python or Perl scripting
Experience with SPICE, coverage collection, waveform analysis, and automation frameworks
Familiarity with analog IPs (ADC, DAC, LDO, charge pump) and equivalence checks
Excellent debugging, communication, and cross-team collaboration
Team player; proactive collaboration and execution
Flexibility to switch technical context; willingness to learn new tools/methods
Ability to prioritize, multitask, and
Dice is the leading career destination for tech experts at every stage of their careers. Our client, Cohesive Technologies LLC, is seeking the following. Apply via Dice today!
Cohesive Technologies is a global IT Services & Solutions company providing IT Staffing Services and Application Development Services necessary for technology leaders to deliver business value. We help our people and clients succeed by leveraging our expertise, deep industry and market knowledge, proprietary assessment tools and techniques, and project delivery methodologies. Through relationships with thousands of specialized professionals, we bring an unparalleled ability to match talent with opportunities by assessing, recruiting, developing and engaging the best and brightest people for our clients. We combine broad geographic presence, world-class solutions and a tailored, consultative approach to help our people and clients achieve higher performance and outstanding results.
Position Title: Analog/Mixed-Signal Verification Engineer
Location: Bay Area, CA
Type: Full-Time
We are seeking a skilled Mixed-Signal Verification Engineer to join our team in the Bay Area. This role focuses on developing, executing, and refining verification strategies for complex mixed-signal ICs used in advanced semiconductor micro-LED products. The ideal candidate will bring deep expertise in analog/mixed-signal verification, modeling, and collaboration across cross-functional design teams. We are looking for somebody who can poke holes in designs.
Review, simulate, and validate analog designs (non-design role) "Poke holes" in designs Work on SPICE simulations, RC extraction, SRAM/Cell architecture understanding Develop and implement mixed-signal verification strategies and coverage plans based on IC design specifications. Design and build verification testbenches using SystemVerilog and industry-standard methodologies. Write and execute test cases to validate the functionality, performance, and reliability of mixed-signal circuits. Develop analog behavioral models and ensure simulation accuracy through equivalence checks. Work on SPICE simulations, RC extraction, SRAM/Cell architecture understanding Work closely with design, layout, and digital verification teams to identify and resolve issues. Sign off mixed-signal blocks and support tapeout readiness. Develop automation scripts to enhance workflow efficiency and ensure model performance remains optimal. Stay current with emerging trends in verification methodologies and modeling techniques.
Basic Qualifications
Bachelor's degree in electrical engineering and equivalent. 15~20 years of relevant experience. Experience with sub-40nm processes and memory architecture preferred Strong understanding of analog and mixed-signal design and verification principles. Proficiency in SystemVerilog, Verilog, and scripting languages such as Python or Perl. Experience with simulation tools, coverage collection, waveform analysis, and automation frameworks. Familiarity with analog IPs (e.g., ADC, DAC, LDO, charge pump) and SPICE-level simulation. Excellent debugging, communication, and cross-team collaboration skills. Preferred additional skills, personal traits and experience Team player Proactiveness in collaborating and execution. Flexibility to switch technical context Willingness to learn new methods/tools/processes Ability to prioritize and multitask Strong problem-solving and critical-thinking skills Strong communication and interpersonal skills
Cohesive Technologies is an equal access/equal opportunity employer and does not discriminate on the basis of age, color, disability, marital status, national origin, race, religion, sex, sexual orientation, veteran status or any other classification prescribed by applicable law.