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Senior Staff Formal Verification Engineer at Qualcomm - QATestingJobs.com
Senior Staff Formal Verification Engineer
Qualcomm • San Diego, California, United States
hybridfull-time
Posted Dec 2, 2025Apply by May 31, 2026
Role & seniority: Senior Graphics Formal Verification Engineer (experienced ASIC/FPGA verification focused on GPU designs)
Stack/tools: Verilog RTL; model creation; emulation/accelerated platforms (Veloce, Palladium, ZeBu) and FPGA-based flows; RTL/SystemVerilog/UVM; C/C++; scripting (Python, Tcl, Perl); waveform viewers; vendor tools (Xilinx/Altera); debug and assertion development; system-level RTL simulation; test plans
Top 3 responsibilities
Synthesize Verilog RTL, create models, and port/compile to emulators and FPGA platforms
Develop hardware emulator implementation (partitioning, synthesis, place&route, timing analysis, run-time performance) and drive debug on emulator
Verify designs end-to-end with designers and software teams; work on system-level RTL simulation, IP integration, bring-up, and post-silicon debug
Must-have skills
Bachelor’s degree with 6+ years (or relevant advanced degree with proportional experience) in CE/CS/EE; or PhD with 4+ years
Proficiency in debugging, deep bug hunting, formal tools/methodologies, and assertion development
Experience with Verilog/SystemVerilog, RTL synthesis/verification, and emulation platforms (Palladium, ZeBu, Veloce) or FPGA-based emulation
Experience in design validation, post-silicon debug, and building high-performance/area-efficient emulation environments
Programming/scripting: C/C++, Python/Tcl/Perl; familiarity with vendor tools and waveform viewing
Nice-to-haves
MS
Full Description
Company
Qualcomm Technologies, Inc.
Job Area
Engineering Group, Engineering Group > GPU ASICS Engineering
General Summary
QCT's Digital ASIC design team delivers cutting edge hardware and software products that power the user experience and graphics content of the most advanced mobile devices on the market.
Graphics formal verification positions involve the developing high-quality formal verification test benches to verify complex designs in GPU. Position involves working with design, implementation teams to verify designs with high quality. Must be proficient in debugging, deep bug hunting, formal tools, formal verification methodologies and processes. Candidate should be proficient in design debug and assertion development.
Minimum Qualifications
Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
Job Description
Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu and/or FPGA platforms
Develop all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis, place and route, timing analysis & run time performance.
Drive debug failures on emulator using latest technologies. Work with designers and SW driver team for testplan and debug.
Work with tool vendors and push the methodology to improve the area/performance of the synthesized FPGA RTL.
Work on third-party IP integration and system-level debugging.
System level RTL simulation & design verification.
Support chip bring up and post silicon debug.
Debug functional and timing models.
Preferred Qualifications
Bachelors degree in Science, Engineering, or closely related field
1+ years of hands on experience in emulation/simulation acceleration/FPGA.
1+ years in Design validation/Post-Silicon debug.
1+ years of hands on experience in creating high performance & area efficient emulation environments from RTL.
Knowledge of Vendor Emulation tools/Xilinx tools/Synthesis tools
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
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Pay range and Other Compensation & Benefits
$195,200.00 - $292,800.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
